XRT86VL38 Datasheet, PDF (87/180 Pages) Exar Corporation – OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

REV. P1.0.9
PRELIMINARY
XRT86VL38
OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
TABLE 65: TRANSMIT CHANNEL CONTROL REGISTER 0-31 (TCCR 0-31)
HEX ADDRESS: 0Xn300 TO 0Xn31F
BIT
FUNCTION
TYPE DEFAULT
DESCRIPTION-OPERATION
7 LAPDcntl[1]
R/W
1
Transmit LAPD Control
6 LAPDcntl[0]
0
These bits select which one of the three Transmit LAPD controller is config-
ured to use D/E time slot (Octets 0-31) for transmitting LAPD messages.
The following table presents the different settings of these two bits.
5-4 Reserved
LAPDCNTL[1:0]
LAPD CONTROLLER SELECTED
00
Transmit LAPD Controller 1
01
Transmit LAPD Controller 2
10
The TxDE[1:0] bits in the Transmit Signaling and
Data Link Select Register (TSDLSR - Register
Address - 0xn10A, bit 3-2) determine the data
source for D/E time slots.
11
Transmit LAPD Controller 3
NOTE:
All three Transmit LAPD Controllers can use D/E timeslots for
transmission. However, only Transmit LAPD Controller 1 can use
datalink for transmission. Register 0xn300 represents D/E time slot
0, and 0xn31F represents D/E time slot 31.
-
-
Reserved (For T1 mode only)
82