XRT86VL38 Datasheet, PDF (83/180 Pages) Exar Corporation – OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

PRELIMINARY
XRT86VL38
REV. P1.0.9
OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
TABLE 60: DATA LINK CONTROL REGISTER (DLCR3)
HEX ADDRESS: 0Xn153
BIT
FUNCTION
TYPE DEFAULT
DESCRIPTION-OPERATION
2 Tx_IDLE
R/W
0
Transmit Idle (Flag Sequence Byte)
This bit configures the Transmit HDLC Controller Block #3 to unconditionally
transmit a repeating string of Flag Sequence octets (0X7E) in the data link
channel to the Remote terminal. In normal conditions, the Transmit HDLC
Controller block will repeatedly transmit the Flag Sequence octet whenever
there is no MOS message to transmit to the remote terminal equipment.
However, if the user invokes this “Transmit Idle Sequence” feature, then the
Transmit HDLC Controller block will UNCONDITIONALLY transmit a repeat-
ing stream of the Flag Sequence octet (thereby overwriting all outbound
MOS data-link messages).
0 - Configures the Transmit HDLC Controller Block # 3 to transmit data-link
information in a “normal” manner.
1 - Configures the Transmit HDLC Controller block # 3 to transmit a repeat-
ing string of Flag Sequence Octets (0x7E).
NOTE: This bit is ignored if the Transmit HDLC3 controller is operating in the
BOS Mode - bit 0 (MOS/BOS) within this register is set to 0.
1 Tx_FCS_EN
R/W
0
Transmit LAPD Message with Frame Check Sequence (FCS)
This bit permits the user to configure the Transmit HDLC Controller block # 3
to compute and append FCS octets to the “back-end” of each outbound
MOS data-link message.
0 - Configures the Transmit HDLC Controller block # 3 to NOT compute and
append the FCS octets to the back-end of each outbound MOS data-link
message.
1 - Configures the Transmit HDLC Controller block # 3 TO COMPUTE and
append the FCS octets to the back-end of each outbound MOS data-link
message.
NOTE: This bit is ignored if the transmit HDLC3 controller has been
configured to operate in the BOS mode - bit 0 (MOS/BOS) within this
register is set to 0.
0 MOS/BOS
R/W
0
Message Oriented Signaling/Bit Oriented Signaling Select
This bit permits the user to configure Transmit and Receive HDLC Controller
Block # 3 to be transmitting and receiving either BOS (Bit-Oriented Signal-
ing) or MOS (Message-Oriented Signaling) frames, as depicted below.
0 - Configures Transmit and Receive HDLC Controller block # 3 to transmit
and receive BOS messages.
1 - Configures the Transmit and Receive HDLC Controller block # 3 to trans-
mit and receive MOS messages.
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