XR19L220_07 Datasheet, PDF (8/43 Pages) Exar Corporation – SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER

XR19L220
SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
REV. 1.0.1
TABLE 2: INT (IRQ#) PIN OPERATION FOR RECEIVER
INT Pin
(I/M# = 1)
IRQ# Pin
(I/M# = 0)
FCR BIT-0 = 0
(FIFO DISABLED)
0 = no data
1 = 1 byte
1 = no data
0 = 1 byte
FCR BIT-0 = 1
(FIFO ENABLED)
0 = FIFO below trigger level
1 = FIFO above trigger level
1 = FIFO below trigger level
0 = FIFO above trigger level
2.8 Crystal or External Clock Input
The L220 includes an on-chip oscillator (XTAL1 and XTAL2) to generate a clock when a crystal is connected
between the XTAL1 and XTAL2 pins of the device. Alternatively, an external clock can be supplied through the
XTAL1 pin. The CPU data bus does not require this clock for bus operation. The crystal oscillator provides a
system clock to the Baud Rate Generators (BRG) section found in each of the UART. XTAL1 is the input to the
oscillator or external clock input and XTAL2 pin is the bufferred output which can be used as a clock signal for
other devices in the system. Please note that the input XTAL1 is not 5V tolerant and therefore, the maximum
voltage at the pin should be VCC when an external clock is supplied. For programming details, see
“Programmable Baud Rate Generator.”
FIGURE 4. TYPICAL CRYSTAL CONNECTIONS
XTAL1
C1
22-47pF
XTAL2
R2
500K - 1M
R1
0-120
(Optional)
Y1
1.8432 MHz
to
24 MHz
C2
22-47pF
The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,
fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100ppm frequency
tolerance) connected externally between the XTAL1 and XTAL2 pins. When VCC = 5V, the on-chip oscillator
can operate with a crystal whose frequency is not greater than 24 MHz. On the other hand, the L220 can
accept an external clock of up to 50MHz at XTAL1 pin also. Although the L220 can accept an exteran clock of
up to 50MHz, the maximum data rate supported by the RS-232 drivers is 250Kbps. For further reading on the
oscillator circuit please see the Application Note DAN108 on the EXAR web site at http://www.exar.com.
2.9 Programmable Baud Rate Generator
The L220 UART has its own Baud Rate Generator (BRG) with a prescaler. The prescaler is controlled by a
software bit (bit-7) in the MCR register. This bit selects the prescaler to divide the input crystal or external clock
by a factor of 1 or 4. The clock output of the prescaler goes to the BRG. The BRG further divides this clock by
a programmable divisor (via DLL and DLM registers) between 1 and (2¹⁶ -1) to obtain a 16X sampling rate
clock of the serial data rate. The sampling rate clock is used by the transmitter for data bit shifting and receiver
for data sampling. The BRG divisor defaults to the maximum baud rate (DLL = 0x01 and DLM = 0x00) upon
power up.
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