XRT71D03 Datasheet, PDF (7/24 Pages) Exar Corporation – 3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR

áç
PIN DESCRIPTION
PIN #
31
NAME
FL_2
32
AGND
33
AVDD
34
GND
35
RRCLK_2
36
RRPOS_2
37
RRNEG_2
38
FSS
39
SDO
40
DS3/E3_2
41
VDD
42
NC
43
RCLKES
44
RRNEG_1
45
RRPOS_1
XRT71D03
3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR
REV. 1.2.0
TYPE
O
****
****
****
O
O
O
I
O
I
****
I
O
O
DESCRIPTION
FIFO Limit - channel 2:
See description pin 18
Analog Ground
Analog Power Supply =5±5% or 3.3V±5%
Digital Ground
Received Recovered Output (De-jittered) Clock - channel 2:
See description of pin 3
Received Recovered Positive Data (De-Jittered) Output - channel
2:
See description of pin 4
Received Recovered Negative Data (De-Jittered) Output - channel
2:
See description of pin 5
FIFO Size Select Input:
When “High”: Selects 32 bits FIFO.
When “Low”: Selects 16 bits FIFO.
Internal 50 K Ohm pull-down resistor.
Serial Data Output:
This pin will serially output the contents of the specified Command Register,
during “Read” Operations. The data, on this pin, will be updated on the falling
edge of the SCLK input signal. This pin will be tri-stated upon completion of
data transfer.
DS3/E3 Select Input - channel 2:
See description pin 8
Internal 50 K Ohm pull-down resistor.
Digital Power Supply = 5V±5% or 3.3V±5%
No Connection
Received Clock Edge Select Input:
Hardware Mode
1. When RCLKES = “0”, then RPOS and RNEG are updated on the falling
edge of RCLK
2. When RCLKES = “1”, then RPOS and RNEG are updated on the rising
edge of RCLK
NOTE: This applies to all channels.
Host Mode
Connect this pin to GND when the 71D03 is configured in the Host Mode.
Internal 50 K Ohm pull-down resistor.
Received Recovered Negative Data (De-Jittered) Output - channel
1:
See description of pin 5
Received Recovered Positive Data (De-Jittered) Output - channel
1:
See description of pin 4
6