XR16M554 Datasheet, PDF (7/46 Pages) Exar Corporation – 1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO

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Pin Description
XR16M554/554D
1.62V TO 3.63V QUAD UART WITH 16-BYTE FIFO
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN#
80-LQFP
PIN #
TYPE
DESCRIPTION
CDA#
-
CDB#
-
CDC#
-
CDD#
-
64
9
19
I UART channels A-D Carrier-Detect (active low) or gen-
18
27
42
31
43
59
49
61
2
eral purpose input. This input should be connected to
VCC when not used. This input has no effect on the
UART.
RIA#
-
63
8
18
I UART channels A-D Ring-Indicator (active low) or gen-
RIB#
-
19
28
43
RIC#
-
30
42
58
RID#
-
50
62
3
eral purpose input. This input should be connected to
VCC when not used. This input has no effect on the
UART.
ANCILLARY SIGNALS
XTAL1
18
25
35
50
I Crystal or external clock input.
XTAL2
19
26
36
51
O Crystal or buffered clock output.
16/68#
14
-
31
-
I Intel or Motorola Bus Select (input with internal pull-up).
When 16/68# pin is HIGH, 16 or Intel Mode, the device
will operate in the Intel bus type of interface.
When 16/68# pin is LOW, 68 or Motorola mode, the
device will operate in the Motorola bus type of interface.
Motorola bus interface is not available on the 64 pin
package.
RESET
20
27
37
53
I When 16/68# pin is HIGH for Intel bus interface, this
(RESET#)
input becomes the Reset pin (active high). In this case,
a 40 ns minimum HIGH pulse on this pin will reset the
internal registers and all outputs. The UART transmitter
output will be held HIGH, the receiver input will be
ignored and outputs are reset during reset period
(Table 13). When 16/68# pin is at LOW for Motorola
bus interface, this input becomes Reset# pin (active
low). This pin functions similarly, but instead of a HIGH
pulse, a 40 ns minimum LOW pulse will reset the inter-
nal registers and outputs.
Motorola bus interface is not available on the 64 pin
package.
VCC
2, 24, 37 4, 21, 35, 13, 30, 5, 25, 45, Pwr 1.62V to 3.63V power supply.
52
47, 64
65
GND
GND
21, 47
Center
Pad
14, 28,
45, 61
N/A
6, 23, 40,
57
N/A
16, 36,
56, 76
N/A
Pwr Power supply common, ground.
Pwr _{The center pad on the backside of the QFN package is}
metallic and should be connected to GND on the PCB.
The thermal pad size on the PCB should be the approx-
imate size of this center pad and should be solder mask
defined. The solder mask opening should be at least
0.0025" inwards from the edge of the PCB thermal pad.
7