XR17D154 Datasheet, PDF (68/69 Pages) Exar Corporation – UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART

XR17D154
REV. 1.2.0
xr
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
5.2.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................. 28
TABLE 10: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK AT 16X SAMPLING ........................................ 28
5.2.3 TRANSMITTER OPERATION IN FIFO MODE ........................................................................................................... 29
5.2.4 AUTO RS485 OPERATION ........................................................................................................................................ 29
FIGURE 12. TRANSMITTER OPERATION IN NON-FIFO MODE ............................................................................................................ 29
FIGURE 13. TRANSMIITTER OPERATION IN FIFO AND FLOW CONTROL MODE................................................................................... 29
5.3 RECEIVER ...................................................................................................................................................... 30
5.3.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 30
5.3.2 RECEIVER OPERATION IN NON-FIFO MODE ........................................................................................................ 30
FIGURE 14. RECEIVER OPERATION IN NON-FIFO MODE .................................................................................................................. 30
5.3.3 RECEIVER OPERATION WITH FIFO ......................................................................................................................... 31
5.4 AUTOMATIC HARDWARE (RTS/CTS OR DTR/DSR) FLOW CONTROL OPERATION .............................. 31
FIGURE 15. RECEIVER OPERATION IN FIFO AND FLOW CONTROL MODE ......................................................................................... 31
TABLE 11: AUTO RTS/CTS OR DTR/DSR FLOW CONTROL SELECTION .......................................................................................... 31
FIGURE 16. AUTO RTS/DTR AND CTS/DSR FLOW CONTROL OPERATION...................................................................................... 32
5.5 INFRARED MODE .......................................................................................................................................... 33
FIGURE 17. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING .......................................................................... 33
5.6 INTERNAL LOOPBACK ................................................................................................................................. 34
5.7 UART CHANNEL CONFIGURATION REGISTERS AND ADDRESS DECODING ....................................... 34
FIGURE 18. INTERNAL LOOP BACK ................................................................................................................................................. 34
TABLE 12: UART CHANNEL CONFIGURATION REGISTERS ................................................................................................... 35
TABLE 13: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED BY EFR BIT-4. ....... 36
5.8 REGISTERS .................................................................................................................................................... 37
5.8.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 37
5.8.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY......................................................................................... 37
5.8.3 BAUD RATE GENERATOR DIVISORS (DLL AND DLM) - READ/WRITE................................................................ 37
5.8.4 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .......................................................................................... 37
IER versus Receive FIFO Interrupt Mode Operation................................................................................................. 37
IER versus Receive/Transmit FIFO Polled Mode Operation ..................................................................................... 37
5.8.5 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY............................................................................................ 38
TABLE 14: INTERRUPT SOURCE AND PRIORITY LEVEL ..................................................................................................................... 39
5.8.6 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY .................................................................................................. 40
TABLE 15: TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION ............................................................................................ 41
5.8.7 LINE CONTROL REGISTER (LCR) - READ/WRITE .................................................................................................. 42
5.8.8 MODEM CONTROL REGISTER (MCR) - READ/WRITE ........................................................................................... 43
TABLE 16: PARITY SELECTION ........................................................................................................................................................ 43
5.8.9 LINE STATUS REGISTER (LSR) - READ/ONLY ....................................................................................................... 44
5.8.10 MODEM STATUS REGISTER (MSR) - READ-ONLY .............................................................................................. 45
5.8.11 MODEM STATUS REGISTER (MSR) - WRITE-ONLY ............................................................................................. 46
TABLE 17: AUTO RS485 HALF-DUPLEX DIRECTION CONTROL DELAY FROM TRANSMIT-TO-RECEIVE ................................................. 46
5.8.12 SCRATCH PAD REGISTER (SPR) - READ/WRITE................................................................................................. 47
5.8.13 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE .................................................................................... 47
5.8.14 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE..................................................................................... 48
TABLE 18: 16 SELECTABLE HYSTERESIS LEVELS WHEN TRIGGER TABLE-D IS SELECTED ................................................................ 48
TABLE 19: SOFTWARE FLOW CONTROL FUNCTIONS ........................................................................................................................ 49
5.8.15 TXCNT[7:0]: TRANSMIT FIFO LEVEL COUNTER - READ-ONLY ......................................................................... 50
5.8.16 TXTRG [7:0]: TRANSMIT FIFO TRIGGER LEVEL - WRITE-ONLY ........................................................................ 50
5.8.17 RXCNT[7:0]: RECEIVE FIFO LEVEL COUNTER - READ-ONLY ............................................................................ 50
5.8.18 RXTRG[7:0]: RECEIVE FIFO TRIGGER LEVEL - WRITE-ONLY............................................................................ 50
TABLE 20: UART RESET CONDITIONS ...................................................................................................................................... 51
6.0 PROGRAMMING EXAMPLES .............................................................................................................52
6.1 UNLOADING RECEIVE DATA USING THE SPECIAL RECEIVE FIFO DATA WITH STATUS .................. 52
ABSOLUTE MAXIMUM RATINGS...................................................................................53
ELECTRICAL CHARACTERISTICS ................................................................................53
DC ELECTRICAL CHARACTERISTICS FOR 5V PCI BUS INTERFACE (VIO = 4.75-5.25V, VCC = 4.5-5.5V)
53
AC ELECTRICAL CHARACTERISTICS FOR 5V PCI BUS INTERFACE (VIO = 4.75-5.25V, VCC = 4.5-5.5V)
54
DC ELECTRICAL CHARACTERISTICS FOR 3.3V PCI BUS INTERFACE (VIO = 3.0-3.6V, VCC = 3.0-5.5V)55
TA=0o to 70oC (-40o to +85oC for industrial grade package)................................................................................... 55
AC ELECTRICAL CHARACTERISTICS FOR 3.3V PCI BUS INTERFACE (VIO = 3.0-3.6V, VCC = 3.0-5.5V)56
TA=0o to 70oC (-40o to +85oC for industrial grade package)................................................................................... 56
FIGURE 19. TIMING FOR EXTERNAL CLOCK INPUT AT XTAL1 PIN.................................................................................................... 57
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