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XRT75R12_07 Datasheet, PDF (62/90 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.3
TABLE 21: APS/REDUNDANCY TRANSMIT CONTROL REGISTER - CR128 (ADDRESS LOCATION = 0X80)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved Reserved TxON Ch 11 TxON Ch 10 TxON Ch 9 TxON Ch 8 TxON Ch 7 TxON Ch 6
R/W
R/W
R/W
R/W
R/W
R/W
BIT
NUMBER
NAME
7,6
Reserved
5
TxON Ch 11
4
TxON Ch 10
3
TxON Ch 9
2
TxON Ch 8
1
TxON Ch 7
0
TxON Ch 6
TYPE
DESCRIPTION
R/W Transmit Section ON - Channel n
This READ/WRITE bit-field is used to turn on or turn off the Transmit Driver associated
with Channel n. If the user turns on the Transmit Driver, then Channel n will transmit
DS3, E3 or STS-1 pulses on the line via the TTIP_n and TRING_ n output pins.
Conversely, if the user turns off the Transmit Driver, then the TTIP_n and TRING_n
output pins will be tri-stated.
0 - Shuts off the Transmit Driver associated with Channel n and tri-states the TTIP_n
and TRING_ n output pins.
1 - Turns on the Transmit Driver associated with Channel n.
NOTE: The master TxON control pin(pin # P4) must be in a high state (logic 1) for this
operation to turn on any channel.
TABLE 22: APS/REDUNDANCY RECIEVE CONTROL REGISTER - CR136 (ADDRESS LOCATION = 0X88)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved Reserved RxON Ch 11 RxON Ch 10 RxON Ch 9 RxON Ch 8 RxON Ch 7 RxON Ch 6
R/W
R/W
R/W
R/W
R/W
R/W
BIT
NUMBER
NAME
TYPE
DESCRIPTION
7,6
Reserved
5
RxON Ch 11 R/W Receive Section ON - Channel n
4
RxON Ch 10
3
RxON Ch 9
2
RxON Ch 8
1
RxON Ch 7
0
RxON Ch 6
This READ/WRITE bit-field is used to turn on or turn off the Receiver associated with
Channel n on a per channel basis. If the user turns on the Receiver, then Channel n
will Receive DS3, E3 or STS-1 pulses on the line via the RTIP_n and RRING_ n input
pins.
Conversely, if the user turns off the Receiver Driver (for channel n), the RTIP_n and
RRING_n input pins will be in a high impedance state.
0 - Shuts off the Receive Driver associated with Channel n and puts the RTIP_n and
RRING_ n input pins in a high impedance state.
1 - Turns on the Receive Driver associated with Channel n.
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