XRT75R12_07 Datasheet, PDF (60/90 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER

XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
TABLE 17: COMMAND REGISTER ADDRESS MAP, WITHIN THE XRT75R12
ADDRESS
(HEX)
COMMAND REGISTER
(DECIMAL)
LABEL
TYPE
REGISTER NAME
0xF5
0xF6
0xF7
0xF8
0xF5
0xF9
0xFA
0xFB
0xFC
0xFD
0xFE
0xFF
REV. 1.0.3
THE GLOBAL/CHIP-LEVEL REGISTERS
The register set, within the XRT75R12 contains ten global or chip-level registers. These registers control
operations in more than one channel or apply to the complete chip. This section will present detailed
information on the Global Registers.
ADDRESS
0x00
0x08
0x80
0x88
0x60
0x61
0xE0
0xE1
0x6E
0x6F
TABLE 18: LIST AND ADDRESS LOCATIONS OF GLOBAL REGISTERS
COMMAND
REGISTER
LABEL
TYPE
REGISTER NAME
CR0
APST R/W APS Transmit Redundancy Control Register 0-5
CR8
APSR R/W APS Receive Redundancy Control Register 0-5
CR128
APST R/W APS Transmit Redundancy Control Register 6-11
CR136
APSR R/W APS Receive Redundancy Control Register 6-11
CR96
CIE
R/W Channel 0-5 Interrupt Enable flags
CR97
CIS
R/O Channel 0-5 Interrupt status flags
CR224
CIE
R/W Channel 6-11 Interrupt Enable flags
CR225
CIS
R/O Channel 6-11 Interrupt status flags
CR110
PN
ROM Device Part Number Register
CR111
VN
ROM Chip Revision/Version Number Register
57