XRP7724 Datasheet, PDF (6/29 Pages) Exar Corporation – Quad Channel Digital PWM/PFM Programmable Power Management System

XRP7724
Quad Channel Digital PWM/PFM
Programmable Power Management System
SMBUS (I2C) INTERFACE
Parameter
Input Pin Low Level, VIL
Input Pin High Level, VIH
Hysteresis of Schmitt Trigger
inputs, Vhys
Output Pin Low Level (open
drain or collector), VOL
Input leakage current
Output fall time from VIHmin to
VILmax
Internal Pin Capacitance
Min.
0.7 VIO
0.05 VIO
-10
20 + 0.1
Cb
Typ.
Max.
0.3 VIO
Units
V
V
V
0.4
V
10
µA
250
ns
1
pF
Conditions
VIO = 3.3 V ±10%
VIO = 3.3 V±10%
VIO = 3.3 V±10%
ISINK = 3mA
Input is between 0.1 VIO and 0.9 VIO
With a bus capacitance (Cb)from 10 pF to
400 pF
GATE DRIVERS
Parameter
GH, GL Rise Time
GH, GL Fall Time
Min.
Typ.
17
11
Max.
Units
ns
ns
Conditions
At 10-90% of full scale, 1nF Cload
GH, GL Pull-Up On-State Output
Resistance
GH, GL Pull-Down On-State
Output Resistance
GH, GL Pull-Down Resistance in
Off-Mode
Bootstrap diode forward
resistance
Minimum On Time
Minimum Off Time
Minimum Programmable Dead
Time
Maximum Programmable Dead
Time
Programmable Dead Time
Adjustment Step
4
5
Ω
2
2.5
Ω
50
kΩ
9
Ω
50
ns
125
ns
20
ns
Tsw
607
ps
VCC = VCCD = 0V.
@ 10mA
1nF of gate capacitance.
1nF of gate capacitance
Does not include dead time variation from
driver output stage
Tsw=switching period
© 2012 Exar Corporation
6/29
Rev. 1.0.1