XRP7724 Datasheet, PDF (21/29 Pages) Exar Corporation – Quad Channel Digital PWM/PFM Programmable Power Management System

XRP7724
Quad Channel Digital PWM/PFM
Programmable Power Management System
specified way if the current level
surpasses threshold level.
 Start-up Time-out Fault monitors if a
channel gets into regulation in a user
defined time period
 LDO5 Over Current Protection (LDO5
OCP) monitor current drawn from the
regulator and will cause the controller to
be reset if the current exceeds LDO5 limit
(155mA typical)
 LDO3.3 Over Current Protection
(LDO3.3 OCP) monitors current drawn
from the regulator and will cause the
controller to shut down the regulator if the
current exceeds LDO3.3 current limit
(65mA typical)
UVLO
Both UVLO warning and fault levels are user
programmable and set at 200mV increments
in PA5.
When the warning level is reached the
controller
will
generate
the
UVLO_WARNING_EVENT interrupt. In
addition, the host can be informed about the
event through HW Flags on GPIO0 (see the
Digital I/O section).
When an under voltage fault condition occurs,
the XRP7724 outputs are shutdown and the
UVLO_FAULT_ACTIVE_EVENT interrupt is
generated. In addition, the host can be
informed by forwarding the Low Vcc signal to
any GPIO/PSIO (see the Digital I/O section).
This signal transitions when the UVLO fault
occurs. When coming out of the fault, rising
Vcc crossing the UVLO fault level will trigger
the UVLO_FAULT_INACTIVE_EVENT interrupt.
Once UVLO condition clears (Vcc voltage rises
Above or TO the user defined UVLO warning
level), the Low Vcc signal will transition and
the controller will be reset.
A special attention needs to be paid in the
case when Vcc = LDO5 = 4.75V to 5.5V.
Since the input voltage ADC resolution is
200mV, the UVLO warning and fault set
points are coarse for a 5V input. Therefore,
setting the warning level at 4.8V and the fault
level at 4.6V may result in the outputs not re-
enable until a full 5.0V is reached on Vcc.
Setting the warning level to 4.6v and the fault
level at 4.4V would likely make UVLO handing
as desired, however, below 4.6V the device
has a hardware UVLO on LDO5 to ensure
proper shutdown of the internal circuitry of
the controller. This means the 4.4V UVLO
fault level will never occur. A special test has
been added to ensure that if UVLO FAULT will
OTP
User defined OTP warning, fault and restart
levels are set at 5°C increments in PA5.
When the warning level is reached the
controller
will
generate
the
TEMP_WARNING_EVENT
interrupt.
In
addition, the host can be informed about the
event through HW Flags on GPIO0 (see the
Digital I/O section).
When an OTP fault condition occurs, the
XRP7724 outputs are shutdown and the
TEMP_OVER_EVENT interrupt is generated.
Once temperature reaches a user defined OTP
Restart
Threshold
level,
the
TEMP_UNDER_EVENT interrupt will be
generated and the controller will reset.
OVP
A user defined OVP fault level is set in PA5
and is expressed in percentages of a
regulated target voltage.
Resolution is the same as for the target
voltage (expressed in percentages). The OVP
minimum and maximum values are calculated
by the following equation where the range for
N is 1 to 63:
When the OVP level is reached and the fault is
generated, the host will be notified by the
© 2012 Exar Corporation
21/29
Rev. 1.0.1