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XR16L2551_07 Datasheet, PDF (6/49 Pages) Exar Corporation – LOW VOLTAGE DUART WITH POWERSAVE
XR16L2551
LOW VOLTAGE DUART WITH POWERSAVE
Pin Description
REV. 1.1.3
NAME
PwrSave
32-QFN
PIN #
9
48-TQFP
PIN #
12
TYPE
DESCRIPTION
I PowerSave (active high). This feature isolates the L2551’s data bus
interface from the host preventing other bus activities that cause higher
power drain during sleep mode. See Sleep Mode with Auto Wake-up
and PowerSave Feature section for details.
RESET
24
(RESET#)
36
I When 16/68# pin is at logic 1 for Intel bus interface, this input becomes
RESET (active high). When 16/68# pin is at logic 0 for Motorola bus
interface, this input becomes RESET# (active low).
A 40 ns minimum active pulse on this pin will reset the internal registers
and all outputs of channel A and B. The UART transmitter output will be
held at logic 1, the receiver input will be ignored and outputs are reset
during reset period (see UART Reset Conditions).
VCC
26
42
Pwr 2.25V to 5.5V power supply. All inputs are 5V tolerant.
GND
13
17
GND Center Pad
N/A
Pwr Power supply common, ground.
Pwr The center pad on the backside of the 32-QFN package is metallic and
should be connected to GND on the PCB. The thermal pad size on the
PCB should be the approximate size of this center pad and should be
solder mask defined. The solder mask opening should be at least
0.0025" inwards from the edge of the PCB thermal pad.
N.C.
-
25, 37
No Connection. These pins are not connected internally. But if there is
a possibility of migrating to the XR16L2751 for future needs, please
refer to the XR16L2751 datasheet to determine if these pins should be
connected to VCC or GND.
Pin type: I=Input, O=Output, IO= Input/output, OD=Output Open Drain.
6