XR16M580 Datasheet, PDF (56/56 Pages) Exar Corporation – 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO

XR16M580
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO
REV. 1.0.0
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION .................................................................. 27
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY .................................................................................. 28
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 28
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 28
TABLE 8: INTERRUPT SOURCE AND PRIORITY LEVEL ....................................................................................................................... 29
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY......................................................................................... 30
TABLE 9: TRANSMIT AND RECEIVE FIFO TRIGGER TABLE AND LEVEL SELECTION ............................................................................ 31
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE......................................................................................... 31
TABLE 10: PARITY SELECTION ........................................................................................................................................................ 32
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE.. 32
TABLE 11: INT OUTPUT MODES ..................................................................................................................................................... 33
4.8 LINE STATUS REGISTER (LSR) - READ ONLY.............................................................................................. 34
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 35
4.10 MODEM STATUS REGISTER (MSR) - WRITE ONLY .................................................................................... 36
4.11 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 36
4.12 ENHANCED MODE SELECT REGISTER (EMSR) - WRITE-ONLY ............................................................... 37
TABLE 12: SCRATCHPAD SWAP SELECTION .................................................................................................................................... 37
4.13 BAUD RATE GENERATOR REGISTERS (DLL, DLM AND DLD) - READ/WRITE ....................................... 38
TABLE 13: SAMPLING RATE SELECT ............................................................................................................................................... 38
TABLE 14: BRG SELECT ................................................................................................................................................................ 38
4.14 RX/TX FIFO LEVEL COUNT REGISTER (FC) - READ-ONLY ....................................................................... 39
4.15 FEATURE CONTROL REGISTER (FCTR) - READ/WRITE............................................................................ 39
4.16 ENHANCED FEATURE REGISTER (EFR) - READ/WRITE ........................................................................... 40
TABLE 15: SOFTWARE FLOW CONTROL FUNCTIONS ........................................................................................................................ 40
4.17 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE................... 41
TABLE 16: UART RESET CONDITIONS ...................................................................................................................................... 42
ABSOLUTE MAXIMUM RATINGS.................................................................................. 43
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 43
ELECTRICAL CHARACTERISTICS ............................................................................... 43
DC ELECTRICAL CHARACTERISTICS ............................................................................................................. 43
AC ELECTRICAL CHARACTERISTICS ............................................................................................................. 44
TA = -40O TO +85OC, VCC IS 1.62 TO 3.6V, 70 PF LOAD WHERE APPLICABLE ............................................. 44
FIGURE 16. CLOCK TIMING............................................................................................................................................................. 45
FIGURE 17. MODEM INPUT/OUTPUT TIMING .................................................................................................................................... 46
FIGURE 18. 16 MODE (INTEL) DATA BUS READ TIMING ................................................................................................................... 46
FIGURE 19. 16 MODE (INTEL) DATA BUS WRITE TIMING.................................................................................................................. 47
FIGURE 20. 68 MODE (MOTOROLA) DATA BUS READ TIMING .......................................................................................................... 47
FIGURE 22. RECEIVE READY & INTERRUPT TIMING [NON-FIFO MODE] ............................................................................................ 48
FIGURE 21. 68 MODE (MOTOROLA) DATA BUS WRITE TIMING......................................................................................................... 48
FIGURE 23. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] .......................................................................................... 49
FIGURE 24. RECEIVE READY & INTERRUPT TIMING [FIFO MODE] .................................................................................................... 49
FIGURE 25. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE] .................................................................................................. 50
PACKAGE DIMENSIONS (32 PIN QFN - 5 X 5 X 0.9 mm) .............................................. 51
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1 mm) ............................................... 52
PACKAGE DIMENSIONS (25 PIN BGA - 3 X 3 X 0.8 mm).............................................. 53
REVISION HISTORY...................................................................................................................................... 54
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