XRT75L06D Datasheet, PDF (50/103 Pages) Exar Corporation – SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

XRT75L06D
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SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. 1.0.4
FIGURE 36. SYNCHRONOUS µP INTERFACE SIGNALS DURING PROGRAMMED I/O READ AND WRITE OPERATIONS
PCLK
Addr[7:0]
CS
D[7:0]
RD
WR
RDY
READ OPERATION
t₀
Valid Address
WRITE OPERATION
t₀
Valid Address
Valid Data for Readback
t₁
t₂
Data Available to Write Into the LIU
t₃
t₄
TABLE 14: SYNCHRONOUS TIMING SPECIFICATIONS
SYMBOL
PARAMETER
MIN
t₀
Valid Address to CS Falling Edge
0
t₁
CS Falling Edge to RD Assert
0
t₂
RD Assert to RDY Assert
-
NA
RD Pulse Width (t₂)
40
t₃
CS Falling Edge to WR Assert
0
t₄
WR Assert to RDY Assert
-
NA
WR Pulse Width (t₄)
40
PCLK Period
15
PCLK Duty Cycle
PCLK "High/Low" time
MAX
-
-
35
-
-
35
-
UNITS
ns
ns
ns, see note 1
ns
ns
ns, see note 1
ns
ns
NOTE: 1. This timing parameter is based on the frequency of the synchronous clock (PCLK). To determine the access
time, use the following formula: (PCLK_period * 2) + 5ns
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