XRK39351 Datasheet, PDF (5/10 Pages) Exar Corporation – 3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER

xr
REV. P1.0.0
PRELIMINARY
XRK39351
3.3V OR 2.5V, 9-OUTPUT PLL CLOCK DRIVER
.
AC CHARACTERISTICS (V_CC= 3.3 + 5%, T_A= -40°C TO +85°C) ^a
SYMBOL
PARAMETER
MIN
TYP
f_VCO VCO Frequency
200
f_ref Input Reference Frequency
÷2 feedback 100
÷4 feedback 50
÷8 feedback 25
PLL Bypass
2
f_MAX Max Output Frequency
÷2 feedback 100
÷4 feedback 50
÷8 feedback 25
t_ir/t_if Input Rise/Fall time
f_refDC Input Clock duty cycle
25
t_pd Propagation Delay - (SPO, Input clock to FB)
TCLK to FB_IN -50
PECL to FB_IN -25
t_skew Output-to-Output Skew
t_JIT(CC) Cycle-to-Cycle Jitter (RMS)
÷4 feedback
10
MAX
400
200
100
50
300
200
100
50
1.0
75
150
325
150
22
t_JIT(PER) Period Jitter (RMS)
÷4 feedback
8
15
t_JIT(I/O)
BW
I/O Phase Jitter (RMS)
PLL bandwidth
DC Output duty cycle
t_LOCK Maximum PLL Lock Time
t_or/t_of Output Rise/Fall time
t_PLZ,HZ Output Disable Time
t_PHZ,LZ Output Enable Time
÷2 feedback
÷4 feedback
÷8 feedback
÷2 feedback
÷4 feedback
÷8 feedback
45
47.5
48.75
4 - 17
9.0-20.0
3.0-9.5
1.2-2.1
50
50
50
100
55
52.5
51.75
1.0
1000
10
10
UNIT
MHz
MHz
MHz
CONDITION
PLL_EN = 1
PLL_EN = 1
PLL_EN = 1
PLL_EN = 0
ns
0.8 to 2.0V
%
ps
PLL Locked
ps
PLL Locked
ps
ps All outputs set
to ÷4
ps All outputs set
to ÷4
ps
MHz
MHz
MHz
% 100 - 200MHz
%
50 - 100MHz
%
25 - 50MHz
ms
ps
0.55 to 2.4V
ns
ns
a. AC characteristics apply for parallel output termination of 50Ω to V_TT.
5