XR16L580_07 Datasheet, PDF (5/52 Pages) Exar Corporation – SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE

REV. 1.4.1
Pin Descriptions
XR16L580
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
NAME
RX
RTS#
CTS#
DTR#
DSR#
CD#
RI#
24-
QFN
PIN#
5
-
-
-
-
-
-
28-
QFN
PIN#
5
20
22
-
-
-
-
32-
QFN
PIN#
6
21
24
22
25
26
27
48-
TQFP TYPE
PIN#
DESCRIPTION
7
I _{UART Receive Data or infrared receive data. Normal receive data}
input must idle at logic 1 condition. The infrared receiver idles at
logic 0.
32 O _{UART Request-to-Send (active low) or general purpose output. This}
output must be asserted prior to using auto RTS flow control, see
EFR[6], MCR[1] and IER[6]. This pin is not available in the 24-
QFN package.
38
I _{UART Clear-to-Send (active low) or general purpose input. It can}
be used for auto CTS flow control, see EFR[7], MSR[4] and IER[7].
This input should be connected to VCC when not used. This pin is
not available in the 24-QFN package.
33 O _{UART Data-Terminal-Ready (active low) or general purpose output.}
This pin is not available in the 24-QFN and 28-QFN packages.
39
I _{UART Data-Set-Ready (active low) or general purpose input. This}
input should be connected to VCC when not used. This input has no
effect on the UART. This pin is not available in the 24-QFN and
28-QFN packages.
40
I _{UART Carrier-Detect (active low) or general purpose input. This}
input should be connected to VCC when not used. This input has no
effect on the UART. This pin is not available in the 24-QFN and
28-QFN packages.
41
I _{UART Ring-Indicator (active low) or general purpose input. This}
input should be connected to VCC when not used. This input has no
effect on the UART. This pin is not available in the 24-QFN and
28-QFN packages.
ANCILLARY SIGNALS
XTAL1
9
9
10
14
I _{Crystal or external clock input. This input is not 5V tolerant.}
XTAL2 10
10
11
15 O _{Crystal or buffered clock output. This output may be use to drive a}
clock buffer which can drive other device(s).
PwrSave 8
8
9
13
I _{Power-Save (active high). This feature isolates the L580’s data bus}
interface from the host preventing other bus activities that cause
higher power drain during sleep mode. See Sleep Mode with Auto
Wake-up and Power-Save Feature section for details. This pin has
an internal pull-down resistor in the 48-TQFP package. The 32-QFN
package does not have this pull-down resistor.
16/68#
1
1
2
1
I _{Intel or Motorola Bus Select. This pin has an internal pull-up resistor}
in the 48-TQFP package. The 32-QFN package does not have this
resistor.
When 16/68# pin is at logic 1, 16 or Intel Mode, the device will oper-
ate in the Intel bus type of interface.
When 16/68# pin is at logic 0, 68 or Motorola mode, the device will
operate in the Motorola bus type of interface.
5