XR16L580_07 Datasheet, PDF (20/52 Pages) Exar Corporation – SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE

XR16L580
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
REV. 1.4.1
2.18 Sleep Mode with Wake-Up Interrupt and Power-Save Feature
The L580 supports low voltage system designs, hence, a sleep mode with wake-up interrupt and Power-Save
feature is included to reduce power consumption when the device is not actively used.
2.18.1 Sleep Mode
All of these conditions must be satisfied for the L580 to enter sleep mode:
■ no interrupts pending (ISR bit-0 = 1)
■ the 16-bit divisor programmed in DLM and DLL registers is a non-zero value
■ sleep mode is enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pin is idling at a logic 1
The L580 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The L580 resumes normal operation by any of the following:
■ a receive data start bit transition (logic 1 to 0) at the RX input pin
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the L580 is awakened by any one of the above conditions, it issues an interrupt as soon as the oscillator
circuit is up and running and the device is ready to transmit/receive. This interrupt has the same encoding (bit-
0 of ISR register = 1) as "no interrupt pending" and will clear when the ISR register is read. This will show up in
the ISR register only if no other interrupts are enabled. The L580 will return to the sleep mode automatically
after all interrupting conditions have been serviced and cleared. If the L580 is awakened by the modem inputs,
a read to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while
an interrupt is pending. The L580 will stay in the sleep mode of operation until it is disabled by setting IER bit-4
to a logic 0.
2.18.2 Power-Save Feature
If the address lines, data bus lines, IOW#, IOR#, CS# and modem input lines remain steady when the L580 is
in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on page 37. If the input lines are floating or are toggling while the L580 is in sleep mode, the
current can be up to 100 times more. If not using the Power-Save feature, an external buffer would be required
to keep the address and data bus lines from toggling or floating to achieve the low current. But if the Power-
Save feature is enabled (PwrSave pin connected to VCC), this will eliminate the need for an external buffer by
internally isolating the address, data and control signals (see Figure 1 on page 1) from other bus activities that
could cause wasteful power drain. The L580 enters Power-Save mode when this pin is connected to VCC and
the L580 is in sleep mode (see Sleep Mode section above).
Since Power-Save mode isolates the address, data and control signals, the device will wake-up only by:
■ a receive data start bit transition (logic 1 to 0) at the RX input pin or
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD# or RI#
The L580 will return to the Power-Save mode automatically after a read to the MSR (to reset the modem
inputs) and all interrupting conditions have been serviced and cleared. The L580 will stay in the Power-Save
mode of operation until it is disabled by setting IER bit-4 to a logic 0 and/or the Power-Save pin is connected to
GND.
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