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DAN-170 Datasheet, PDF (5/7 Pages) Exar Corporation – MIGRATING TO EXAR’S FIFTH GENERATION UARTS
DATA COMMUNICATIONS APPLICATION NOTE
DAN170
4.0 SOFTWARE DIFFERENCES
The ST16C454/554/654/854/864 as well as the XR16L784/788 have 16550 compatible registers. In addition,
the XR16L784/788 have the following enhancements/additions:
q Flat Register Set: Apart from the baud rate registers DLL and DLM, there are no shadow registers. The
enhanced registers in the ST16C654 and XR16C854 are shadow registers and require that LCR = 0xBF
before they can be accessed. This is not required for the XR16L784/788.
q Device Configuration Registers: These are newly added registers which provide means to configure or
obtain status from all channels. These are:
s Global Interrupt Registers INT0 - INT3: Provide detailed information on the channel(s) and the type of
interrupt
s TIMER Registers: Configure a general purpose Timer/Counter to issue one-time or periodic interrupts
s 8X Mode: Double the data rate by using an 8X sampling clock instead of 16X sampling
s RESET: Software Reset for all the channels
s SLEEP: Place individual channels in sleep mode to conserve power consumption
s DREV & DVID Registers: Read the Revision and Device ID of the UART (This feature is available
through two shadow registers in the XR16C854/864, but not available in ST16C454/554/654)
s REGB: Write to control registers of all channels simultaneously thereby simplifying the initialization
routine
The advantages of these registers in the newer XR16L784/788 devices are best clarified using the following
software routine examples. These examples show typical receive and transmit interrupt routines for the classic
ST16C454/554/654/854/864 vs. the fifth generation XR16L784 or XR16L788:
4.1 INTERRUPT SERVICE ROUTINE FOR ST16C454/554/654/854/864:
Interrupt_Routine_Classic_QuadUART () {
Disable_Interrupts();
status_channel_A = read (ISR_channel_A);
switch (status_channel_A)
{
case RXRDY :
Read bytes out of RHR;
break;
case TXRDY :
Load bytes into THR;
break;
Other cases :
......
case No_Interrupt :
break;
// go to next channel
}
// end switch statement for channel A
status_channel_B = read (ISR_channel_B);
switch (status_channel_B) {
case ....
........
}
// end switch statement for channel B
......
......
Repeat the above for channels C and D
Enable_Interrupts();
}
// end of Interrupt_Routine
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