XR16L2551 Datasheet, PDF (45/48 Pages) Exar Corporation – LOW VOLTAGE DUART WITH POWERSAVE

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REV. 1.0.0
XR16L2551
LOW VOLTAGE DUART WITH POWERSAVE
FIGURE 25. TRANSMIT READY & INTERRUPT TIMING [FIFO MODE, DMA MODE ENABLED] FOR CHANNELS A & B
TX FIFO
Empty
TX
(Unloading)
INT*
IER[1]
enabled
TXRDY#
Start
Bit
Stop
Bit
S D0:D7 T
S D0:D7 T S D0:D7 T T S D0:D7 T S D0:D7 T
Last Data Byte
Transmitted
S D0:D7 T
ISR is read
TX FIFO no
T_SRT
longer empty
T_SI
T_WRI
TX FIFO
Full
At least 1
empty location
in FIFO
TX FIFO
Empty
T_WT
IOW#
(Loading data
into FIFO)
*INT is cleared when the ISR is read or when there is at least one character in the FIFO.
TXDMA
45