XR16L2551 Datasheet, PDF (22/48 Pages) Exar Corporation – LOW VOLTAGE DUART WITH POWERSAVE

XR16L2551
LOW VOLTAGE DUART WITH POWERSAVE
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REV. 1.0.0
3.0 UART INTERNAL REGISTERS
Each of the UART channel in the L2551 has its own set of configuration registers selected by address lines A0,
A1 and A2 with CSA# or CSB# selecting the channel. The registers are 16C550 compatible. The complete
register set is shown on Table 8 and Table 9....INTERNAL Register descriptions
TABLE 8: UART CHANNEL A AND B UART INTERNAL REGISTERS
A2,A1,A0 ADDRESSES
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 00
0 01
DLL - Div Latch Low Byte
DLM - Div Latch High Byte
Read/Write
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0 01
IER - Interrupt Enable Register
Read/Write
LCR[7] = 0
0 10
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
LCR ≠ 0xBF
0 11
LCR - Line Control Register
Read/Write
1 00
MCR - Modem Control Register
Read/Write
1 01
1 10
LSR - Line Status Register
Reserved
MSR - Modem Status Register
Reserved
Read-only
Write-only
Read-only
Write-only
LCR ≠ 0xBF
1 11
SPR - Scratch Pad Register
Read/Write
ENHANCED REGISTERS
0 10
EFR - Enhanced Function Register
Read/Write
1 00
Xon-1 - Xon Character 1
Read/Write
1 01
Xon-2 - Xon Character 2
Read/Write
LCR = 0xBF
1 10
Xoff-1 - Xoff Character 1
Read/Write
1 11
Xoff-2 - Xoff Character 2
Read/Write
TABLE 9: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1
ADDRESS REG READ/
A2-A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4 BIT-3 BIT-2 BIT-1 BIT-0
COMMENT
16C550 Compatible Registers
0 0 0 RHR RD Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0 0 0 THR WR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
001
IER RD/WR 0/
0/
0/
0/ Modem RX Line TX
RX _{LCR[7] = 0}
Stat. Stat. Empty Data
CTS Int. RTS Int. Xoff Int. Sleep _Int.
Int.
Int
Int.
Enable Enable Enable Mode _{Enable Enable Enable Enable}
Enable
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