XRT75L00 Datasheet, PDF (4/50 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

XRT75L00
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.2
TABLE OF CONTENTS
GENERAL DESCRIPTION.............................................................................................................. 1
FEATURES ..................................................................................................................................................................... 1
APPLICATIONS ............................................................................................................................................................... 1
TRANSMIT INTERFACE CHARACTERISTICS ....................................................................................................................... 2
RECEIVE INTERFACE CHARACTERISTICS ......................................................................................................................... 2
FIGURE 1. BLOCK DIAGRAM OF THE XRT 75L00 ..................................................................................................................................... 2
JITTER ATTENUATORS.................................................................................................................................................... 3
FIGURE 2. PIN OUT OF THE XRT75L00 .................................................................................................................................................. 3
ORDERING INFORMATION.....................................................................................................................3
TABLE OF CONTENTS I
PIN DESCRIPTIONS (BY FUNCTION) .......................................................................................... 4
TRANSMIT INTERFACE .................................................................................................................................................... 4
RECEIVE INTERFACE ...................................................................................................................................................... 6
CLOCK INTERFACE......................................................................................................................................................... 8
OPERATING MODE SELECT............................................................................................................................................ 9
CONTROL AND ALARM INTERFACE .................................................................................................................................. 9
MICROPROCESSOR SERIAL INTERFACE - (HOST MODE)......................................................................................... 11
................................................................................................................................................................................... 13
JITTER ATTENUATOR INTERFACE .................................................................................................................................. 13
ANALOG POWER AND GROUND .................................................................................................................................... 14
DIGITAL POWER AND GROUND .................................................................................................................................... 14
1.0 ELECTRICAL CHARACTERISTICS ....................................................................................................15
TABLE 1: ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................... 15
TABLE 2: DC ELECTRICAL CHARACTERISTICS:....................................................................................................................................... 15
2.0 TIMING CHARACTERISTICS ..............................................................................................................16
FIGURE 3. TYPICAL INTERFACE BETWEEN TERMINAL EQUIPMENT AND THE XRT75L00 (DUAL-RAIL DATA) ................................................. 16
FIGURE 4. TRANSMITTER TERMINAL INPUT TIMING................................................................................................................................. 16
FIGURE 5. RECEIVER DATA OUTPUT AND CODE VIOLATION TIMING .......................................................................................................... 17
FIGURE 6. TRANSMIT PULSE AMPLITUDE TEST CIRCUIT FOR E3, DS3 AND STS-1 RATES ....................................................................... 17
3.0 LINE SIDE CHARACTERISTICS: ........................................................................................................18
3.1 E3 LINE SIDE PARAMETERS: ...................................................................................................................... 18
FIGURE 7. PULSE MASK FOR E3 (34.368 MBITS/S) INTERFACE AS PER ITU-T G.703 ............................................................................... 18
TABLE 3: E3 TRANSMITTER AND RECEIVER LINE SIDE SPECIFICATIONS (TA = 250C AND VDD = 3.3 V ± 5%) .......................................... 18
FIGURE 8. BELLCORE GR-253 CORE TRANSMIT OUTPUT PULSE TEMPLATE FOR SONET STS-1 APPLICATIONS ................................... 19
TABLE 4: STS-1 PULSE MASK EQUATIONS ........................................................................................................................................... 19
TABLE 5: STS-1 TRANSMITTER AND RECEIVER LINE SIDE SPECIFICATIONS (TA = 250C AND VDD =3.3V ± 5%)................................... 20
FIGURE 9. TRANSMIT OUPUT PULSE TEMPLATE FOR DS3 AS PER BELLCORE GR-499 ........................................................................... 20
TABLE 6: DS3 PULSE MASK EQUATIONS............................................................................................................................................... 21
TABLE 7: DS3 TRANSMITTER AND RECEIVER LINE SIDE SPECIFICATIONS (TA = 250C AND VDD = 3.3V ± 5%) ...................................... 21
FIGURE 10. MICROPROCESSOR SERIAL INTERFACE STRUCTURE ............................................................................................................ 22
FIGURE 11. TIMING DIAGRAM FOR THE MICROPROCESSOR SERIAL INTERFACE ....................................................................................... 22
TABLE 8: MICROPROCESSOR SERIAL INTERFACE TIMINGS ( TA = 250C, VDD=3.3V± 5% AND LOAD = 10PF) ........................................ 23
4.0 THE TRANSMITTER SECTION: .........................................................................................................24
4.1 TRANSMIT CLOCK: ....................................................................................................................................... 24
4.2 B3ZS/HDB3 ENCODER: ................................................................................................................................. 24
4.2.1 B3ZS ENCODING: ...................................................................................................................................................... 24
FIGURE 12. SINGLE-RAIL OR NRZ DATA FORMAT (ENCODER AND DECODER ARE ENABLED) .................................................................. 24
FIGURE 13. DUAL-RAIL DATA FORMAT (ENCODER AND DECODER ARE DISABLED).................................................................................... 24
4.2.2 HDB3 ENCODING:...................................................................................................................................................... 25
FIGURE 14. B3ZS ENCODING FORMAT ................................................................................................................................................. 25
FIGURE 15. HDB3 ENCODING FORMAT ................................................................................................................................................. 25
4.3 TRANSMIT PULSE SHAPER: ........................................................................................................................ 26
4.3.1 GUIDELINES FOR USING TRANSMIT BUILD OUT CIRCUIT: ................................................................................. 26
4.3.2 INTERFACING TO THE LINE: .................................................................................................................................... 26
4.4 TRANSMIT DRIVE MONITOR: ....................................................................................................................... 26
4.5 TRANSMITTER SECTION ON/OFF: .............................................................................................................. 27
FIGURE 16. TRANSMIT DRIVER MONITOR SET-UP................................................................................................................................... 27
5.0 THE RECEIVER SECTION ..................................................................................................................28
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