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XR16M2650 Datasheet, PDF (37/47 Pages) Exar Corporation – HIGH PERFORMANCE LOW VOLTAGE DUART WITH 32-BYTE FIFO
REV. 1.0.2
XR16M2650
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 32-BYTE FIFO
AC ELECTRICAL CHARACTERISTICS
Unless otherwise noted: TA = -40o to +85oC, Vcc=1.62 - 3.63V, 70 pF load where applicable
SYMBOL
PARAMETER
LIMITS
1.8V ± 10%
MIN
MAX
LIMITS
2.5V ± 10%
MIN
MAX
LIMITS
3.3V ± 10%
MIN
MAX
UNIT
XTAL1 UART Crystal Oscillator
24
24
24 MHz
ECLK External Clock
32
50
64 MHz
TECLK External Clock Time Period
15
10
7
ns
TAS Address Setup Time
0
0
0
ns
TAH Address Hold Time
0
0
0
ns
TCS Chip Select Width
65
40
35
ns
TRD IOR# Strobe Width
65
40
35
ns
TDY Read Cycle Delay
65
40
35
ns
TRDV Data Access Time
60
35
30 ns
TDD Data Disable Time
25
25
25 ns
TWR IOW# Strobe Width
65
40
35
ns
TDY Write Cycle Delay
65
40
35
ns
TDS Data Setup Time
20
10
10
ns
TDH Data Hold Time
3
3
3
ns
TWDO Delay From IOW# To Output
0
0
0
ns
TMOD Delay To Set Interrupt From MODEM Input
0
0
0
ns
TRSI Delay To Reset Interrupt From IOR#
0
0
0
ns
TSSI Delay From Stop To Set Interrupt
60
35
30 Bclk
TRRI Delay From IOR# To Reset Interrupt
25
25
25 ns
TSI Delay From Stop To Interrupt
20
10
10
ns
TINT Delay From Initial INT Reset To Transmit Start 5
5
5
Bclk
TWRI Delay From IOW# To Reset Interrupt
5
5
5
ns
TSSR Delay From Stop To Set RXRDY#
65
40
35
Bclk
TRR Delay From IOR# To Reset RXRDY#
65
40
35
ns
TWT Delay From IOW# To Set TXRDY#
45
45
45 ns
TSRT Delay From Center of Start To Reset TXRDY#
8
8
8 Bclk
TRST Reset Pulse Width
40
40
40
ns
Bclk Baud Clock
16X or 8X or 4X of data rate
Hz
37