XRT73LC03A Datasheet, PDF (32/61 Pages) Exar Corporation – 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT

XRT73LC03A
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
FIGURE 17. AN EXAMPLE OF B3ZS ENCODING
TClk
TPOS
SR data
10
11
000001111011011001100001100100
Encoded
PDATA
1001001000101001001000100001000100
Encoded
NDATA
0010000001010010010001010100100000
Line signal
00V
B0V
2.3.2 HDB3 Encoding
If the XRT73LC03A is configured to operate in the E3
Mode, then the HDB3/B3ZS Encoder blocks operate
in the HDB3 Mode. When the Encoder is operating in
this mode, it parses through and searches the Trans-
mit Data Stream from the Transmit Logic Block for the
occurrence of four (4) consecutive zeros (e.g.,
"0000"). If the HDB3 Encoder finds an occurrence of
four consecutive zeros, then it substitutes these four
"0’s", with either a "000V" or a "B00V" pattern. The
FIGURE 18. AN EXAMPLE OF HDB3 ENCODING
HDB3 Encoder decides whether to substitute with ei-
ther the "000V" or the "B00V" pattern in order to in-
sure that an odd number of bipolar pulses exist be-
tween any two consecutive violation pulses.
Figure 18 illustrates the HDB3 Encoder at work with
two separate strings of four (or more) consecutive ze-
ros.
TClk
TPOS
SR data
1 0 11
000001111011011001100001100100
Encoded
PDATA
1001000100101001001000100001000100
Encoded
NDATA
0010000001010010010001010010100000
Line signal
000 V
B0 0V
2.3.3 Disabling the HDB3/B3ZS Encoder
The XRT73LC03A HDB3/B3ZS Encoder can be dis-
abled by two methods.
a. Operating in the Hardware Mode.
The HBD3/B3ZS Encoder blocks of all channels
are disabled by setting the ENDECDIS (Encoder/
Decoder Disable) input pin to “1".
NOTE: By executing this step the HDB3/B3ZS Encoder and
Decoder blocks in all channels of the XRT73LC03A are glo-
bally disabled.
a. Operating in the HOST Mode.
When the XRT73LC03A is operating in the HOST
Mode the HDB3/B3ZS Encoders in each channel can
be individually enabled or disabled. Disable the
HDB3/B3ZS Encoder block in Channel(n) by setting
the ENDECDIS(n) bit-field in Command Register
(CR2-(n)), to "1"
COMMAND REGISTER CR2-(n)
D4
D3
D2
D1
D0
Reserved
ENDECDIS_(n)
ALOSDIS_(n)
DLOSDIS_(n)
REQEN_(n)
30