XRT73LC03A Datasheet, PDF (29/61 Pages) Exar Corporation – 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT

XRT73LC03A
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
The default value for each of the bit-fields within these reg-
isters is "0".
a. Operating in the Hardware Mode.
In order to configure individual Channels into the ap-
propriate mode, set the E3_(n), and the STS-1/
DS3_(n) input pins (where n = 0, 1 or 2) to the appro-
priate logic states, as presented below inTable 3.
TABLE 3: SELECTING THE DATA RATE FOR CHANNEL(n) VIA THE E3_(n) AND STS-1/DS3_(n) INPUT PINS
(HARDWARE MODE)
DATA RATE
STATE OF E3_(n) PIN
STATE OF STS-1/DS3_(n) PIN
MODE OF B3ZS/HDB3 ENCODER/
DECODER BLOCKS
E3 (34.368 Mbps)
1
X (Don’t Care)
HDB3
DS3 (44.736 Mbps)
0
0
B3ZS
STS-1 (51.84 Mbps)
0
1
B3ZS
b. Operating in the HOST Mode.
To configure a Channel into the appropriate mode,
write the appropriate values into the STS-1/DS3_(n)
and E3_(n) bit-fields within the Command Register
CR4-(n), as illustrated below (refer to Table 2 for the
correct address for each channel).
COMMAND REGISTER, CR4-(n)
D4
D3
X STS-1/(DS3)_(n))
x
x
D2
D1
D0
E3_(n) LLB_(n) RLB_(n)
x
x
x
Table 4 relates the values of these two bit-fields to the
selected data rates.
TABLE 4: SELECTING THE DATA RATE FOR CHANNEL(n)
VIA THE STS-1/DS3_(n) AND THE E3_(n) BIT-FIELDS
WITHIN THE APPROPRIATE COMMAND REGISTER (HOST
MODE)
SELECTED DATA
RATE
E3
DS3
STS-1
STS-1/DS3_(n)
(D3)
X (Don’t Care)
0
1
E3_(n)
(D2)
1
0
0
2.0 THE TRANSMIT SECTION
Figure 13 indicates that the Transmit Section within
each Channel of the XRT73LC03A consists of the fol-
lowing blocks:
• Transmit Logic Block
• TxClk_(n) Duty Cycle Adjust Block
• HDB3/(B3ZS) Encoder
• Pulse Shaping Block
The purpose of the Transmit Section is to take TTL/
CMOS level data from the terminal equipment and
encode it into a format such that it can:
1. Be efficiently transmitted over coaxial cable at
E3, DS3, or STS-1 data rates.
2. Be reliably received by the Remote Terminal
Equipment at the other end of the E3, DS3, or
STS-1 data link.
3. Comply with the applicable pulse template
requirements.
2.1 THE TRANSMIT LOGIC BLOCK
The purpose of the Transmit Logic Block is to accept
either Dual-Rail or Single-Rail (e.g., a binary data
stream) TTL/CMOS level data and timing information
from the Terminal Equipment.
2.1.1 Accepting Dual-Rail Data from the Termi-
nal Equipment
Whenever the XRT73LC03A accepts Dual-Rail data
from the Terminal Equipment, it does so via the fol-
lowing input signals:
• TPData_(n)
• TNData_(n)
• TxClk_(n)
Figure 14 illustrates the typical interface for the trans-
mission of data in a Dual-Rail Format between the
Terminal Equipment and the Transmit Section of the
XRT73LC03A.
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