XRP9710 Datasheet, PDF (30/36 Pages) Exar Corporation – Dual 6A Programmable Power Module

XRP9710 and XRP9711
Dual 6A Programmable Power Module
CLOCK OUT
XRP9710/1 can supply clock out to be used
by another XRP9710/1 controller. The clock is
routed out through GPIO1 and can be set to
system clock divided by 8 (Sys_Clock/8) or
system clock divided by 4 (Sys_Clock/4)
frequencies.
The functionality is enabled in PA 5.1 by
selecting External Clock-Out function under
GPIO1.
CHANNEL CONTROL
Channels can be controlled independently by
any GPIO/PSIO or I²C command. Channels
will start-up or shut-down following
transitions of signals applied to GPIO/PSIOs
set to control the channels. The control can
always be overridden with an I²C command.
Regardless of whether the channels are
controlled independently or are in a group,
the ramp rates will be followed as specified
(see the Power Sequencing section).
Regulated voltages and voltage drops across
the synchronous FET on each switching
channel can be read back using I²C
commands. The regulated voltage read back
resolution is 15mV, 30mV and 60mV per LSB
depending on the target voltage range. The
voltage drop across synchronous FET read
back resolution is 1.25mV and 2.5mV per LSB
depending on the range.
Through an I²C command the host can check
the status of the channels; whether they are
in regulation or at fault.
Regulated voltages can be dynamically
changed on switching channels using I²C
commands with resolution of 2.5mV, 5mV
and 10mV depending on the target voltage
range (in PWM mode only).
For more information on I²C commands
please refer to ANP-38 or contact Exar or
your local Exar representative.
POWER SEQUENCING
All channels can be grouped together and will
start-up and shut-down in a user defined
sequence.
Selecting none means the channel will not be
assigned to any group and therefore will be
controlled independently.
Group Selection
There are three groups:
• Group 0 – is controlled by the chip
ENABLE or an I²C command. Channels
assigned to this group will come up with
the ENABLE signal being high (plus
additional delay needed to load
configuration from Flash to run-time
© 2014 Exar Corporation
30/36
Rev. 1.0.1