XR17D152 Datasheet, PDF (29/68 Pages) Exar Corporation – UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART

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REV. 1.2.0
5.3.2 Receiver Operation in non-FIFO Mode
XR17D152
UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART
FIGURE 14. RECEIVER OPERATION IN NON-FIFO MODE
16X or 8X C lock
(8 X M O D E R e g is ter)
R eceive D ata S hift
R e g is te r (R S R )
D a ta B it
V a lida tio n
R e ce iv e D a ta C h a ra cte rs
R eceive
D ata B yte
and E rrors
E rror
T a gs in
LS R bits
3 :1
R eceive D ata
H o ld in g R e g is ter
(R H R )
R H R In te rru pt (IS R b it-2 )
5.3.3 Receiver Operation with FIFO
FIGURE 15. RECEIVER OPERATION IN FIFO AND FLOW CONTROL MODE
16X or 8X Sampling
Clock (8XMODE Reg.)
64 bytes by 11-
bit wide FIFO
Receive Data
Byte and Errors
Receive Data Shift
Register (RSR)
Receive Data
FIFO
(64-byte)
Receive
Data
Data Bit
Validation
Receive Data Characters
Example:
- FIFO trigger level set at 48 bytes
- RTS/DTR hyasteresis set at +/-8 chars.
Data falls to 40 ^{RTS#/DTR# re-asserts when data falls below the}
trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
FIFO Trigger=48 ^{RHR Interrupt (ISR bit-2) is programmed at}
FIFO trigger level (RXTRG).
FIFO is Enable by FCR bit-0=1
Data fills to 56 ^{RTS#/DTR# de-asserts when data fills above}
the trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RXFIFO1
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