XR16V794 Datasheet, PDF (27/53 Pages) Exar Corporation – HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL

REV. 1.0.0
XR16V794
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
TABLE 12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED BY EFR BIT-4.
ADDRESS
A3-A0
REG
NAME
READ/
WRITE
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0 COMMENT
0 0 0 0 RHR
R
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0 LCR[7]=0
0 0 0 0 THR
W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0 LCR[7]=0
0000
DLL
R/W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0 LCR[7]=1
0 0 0 1 DLM R/W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0 LCR[7]=1
0 0 1 0 DLD R/W
0
0
0
0
Bit-3
Bit-2
Bit-1
Bit-0 LCR[7]=1
0001
IER
R/W
0/
0/
0/
CTS/
DSR# Int.
Enable
RTS/
DTR# Int.
Enable
Xon/Xoff/
Sp. Char.
Int.
Enable
0
Modem RX Line TX Ready RX Data
Status Int. Status Int. Int.
Int.
Enable Enable Enable Enable _LCR[7]=0
0010
ISR
R
FIFOs FIFOs
0/
0/
INT
INT
INT
INT
Enable
Enable
Source
Delta- Xoff/special _Bit-3
Flow Cntl char
Source
Bit-2
Source
Bit-1
Source _LCR[7]=0
Bit-0
0 0 1 0 FCR
W RX FIFO RX FIFO
0/
0/
DMA TX FIFO RX FIFO FIFOs
Trigger Trigger
TX FIFO TX FIFO
Mode
Reset
Reset Enable _LCR[7]=0
Trigger Trigger
0011
LCR
R/W Divisor Set TX Set Parity Even Par- Parity Stop Bits Word
Word
Enable Break
ity
Enable
Length Length
Bit-1
Bit-0
0100
MCR
R/W
0/
0/
0/
Internal _(OP2)¹ _(OP1)¹ RTS# Pin DTR# Pin
Loopback
Control Control
BRG
IR
XonAny Enable TX char RTS/DTR
Prescaler _Enable
Immedi- Flow Sel
ate
0101
LSR
R/W RX FIFO Transmit- TX FIFO RX Break RX Fram- RX Parity RX Over- RX Data
ERROR ter Empty Empty
ing Error Error
run
Ready
0 1 1 0 MSR
R
CD
RI
DSR
CTS
Delta
Delta
Delta
Delta
CD#
RI#
DSR# CTS#
MSR
W
RS485 RS485 RS485 RS485 Disable Disable
DLY-3 DLY-2 DLY-1
DLY-0
TX
RX
0 1 1 1 SPR R/W
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0 User Data
1 0 0 0 FCTR R/W
TRG
Table
Bit-1
TRG
Table
Bit-0
Auto
RS485
Enable
Invert IR RTS/DTR RTS/DTR RTS/DTR RTS/DTR
RX Input Hyst Bit-3 Hyst Bit-2 Hyst Bit-1 Hyst Bit-0
1001
EFR
R/W
Auto
Auto Special Enable Software Software Software Software
CTS/DSR RTS/DTR Char
Enable Enable Select
IER [7:5], ^{Flow Cntl Flow Cntl Flow Cntl Flow Cntl}
ISR [5:4], Bit-3
Bit-2
Bit-1
Bit-0
FCR[5:4],
MCR[7:5,
3:2]
MSR[7:2]
1 0 1 0 TXCNT R
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
27