XR16V794 Datasheet, PDF (19/53 Pages) Exar Corporation – HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL

REV. 1.0.0
XR16V794
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
FIGURE 12. THE XR16V794 REGISTERS
8-bit Data
Bus
Interface
Channel 0
Channel 1
Channel 2
Channel 3
INT0, INT1, INT2,
INT3, TIMER,
SLEEP, RESET
0x00-0F
0x10-1F
0x20-2F
0x30-3F
UART[3:0] Configuration Registers
16550 Compatible and
Exar Enhanced Registers
0x40-7F
(reserved)
0x80-8F
Device Configuration Registers
4 channel Interrupts,
16-bit Timer/Counter,
Sleep, Reset, DVID, DREV
784REGS
3.1 DEVICE CONFIGURATION REGISTER SET
The device configuration registers are directly accessible from the bus. This provides easy programming of
general operating parameters to the 794 UART and for monitoring the status of various functions. The device
configuration registers are mapped onto address 0x80-8F as shown on the register map in Table 8 and
Figure 12. These registers provide global controls and status of all 4 channel UARTs that include interrupt
status, 16-bit general purpose timer control and status, 8X or 16X sampling clock, sleep mode control, soft-
reset control, simultaneous UART initialization, and device identification and revision.
TABLE 7: XR16V794 REGISTER SETS
ADDRESS [A7:A0]
UART CHANNEL SPACE
REFERENCE
COMMENT
0x00 - 0x0F
UART channel 0 Registers
(Table 11 & 12)
0x10 - 0x1F
UART channel 1 Registers
(Table 11 & 12)
0x20 - 0x2F
UART channel 2 Registers
(Table 11 & 12)
0x30 - 0x3F
UART channel 3 Registers
(Table 11 & 12) _{First 8 registers are 16550 compatible}
0x40 - 0x7F
None
Reserved
0x80 - 0x8F
Device Configuration Registers
(Table 8)
Interrupt registers and global controls
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