XR21V1412_10 Datasheet, PDF (24/30 Pages) Exar Corporation – 2-CH FULL-SPEED USB UART

XR21V1412
2-CH FULL-SPEED USB UART
REV. 1.1.0
3.3.14 GPIO_SET Register Description (Read/Write)
Writing a ’1’ in this register drives the GPIO output high. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
3.3.15 GPIO_CLEAR Register Description (Read/Write)
Writing a ’1’ in this register drives the GPIO output low. Writing a ’0’ to a bit has no effect. Bits 7-6 are unused
and should be ’0’.
3.3.16 GPIO_STATUS Register Description (Read-Only)
This register reports the current state of the GPIO pin.
3.4 UART Custom Registers
TABLE 15: UART CUSTOM REGISTERS
ADDRESS
REGISTER NAME
0X03 UART CHAN A
WIDE_MODE
0X04 UART CHAN A
LOW_LATENCY
BIT-7
0
BIT-6
0
BIT-5
0
BIT-4
0
BIT-3
0
0
0
0
0
0
0X06 UART CHAN A
CUSTOM_INT_PACKET
0
GPIO5 GPIO4 GPIO3 GPIO0
0X0B UART CHAN B
WIDE_MODE
0X0C UART CHAN B
LOW_LATENCY
0
0
0
0
0
0
0
0
0
0
0X0E UART CHAN B
CUSTOM_INT_PACKET
0
GPIO5 GPIO4 GPIO3 GPIO0
BIT-2
0
0
0
0
0
0
BIT-1
0
BIT-0
EN
0
EN
GPIO2 GPIO1
0
EN
0
EN
GPIO2 GPIO1
3.4.1 WIDE_MODE Register Description (Read/Write)
This register enables the Wide mode functionality for the UART.
WIDE_MODE[0]: Enable wide mode
• Logic 0 = Normal (7, 8 or 9 bit data) mode
• Logic 1 = Wide mode - See “Section 1.5.1.1, Wide Mode Transmit” on page 9 and “Section 1.5.2.1,
Wide Mode Receive” on page 9.
WIDE_MODE[7:1]: Reserved
These bits are reserved and should remain ’0’.
24