XR21V1412_10 Datasheet, PDF (11/30 Pages) Exar Corporation – 2-CH FULL-SPEED USB UART

REV. 1.1.0
XR21V1412
2-CH FULL-SPEED USB UART
FIGURE 4. AUTO RTS AND CTS FLOW CONTROL OPERATION
Local UART
UARTA
Receiver FIFO
Trigger Reached
RXA
TXB
Remote UART
UARTB
Transmitter
Auto RTS
Trigger Level
Transmitter
RTSA#
TXA
CTSB#
RXB
Auto CTS
Monitor
Receiver FIFO
Trigger Reached
Auto CTS
Monitor
CTSA#
RTSB#
Auto RTS
Trigger Level
RTSA#
CTSB#
TXB
Assert RTS# to Begin
Transmission
1
ON
2
7
ON
3
OFF
8 ^OFF
10 ON
11
ON
Data Starts
4
6 _Suspend ^Restart
9
RXA FIFO
Receive
INTA
Data
RX FIFO
Trigger Level
5
(RXA FIFO
Interrupt)
RTS High
Threshold
RTS Low
Threshold
RX FIFO
12 _{Trigger Level}
RTSCTS1
1.5.5 Automatic DTR/DSR Hardware Flow Control
Auto DTR/DSR hardware flow control behaves the same as the Auto RTS/CTS hardware flow control
described above except that it uses the DTR# and DSR# signals. For Auto hardware flow control,
FLOW_CONTROL[2:0] = ’001’. GPIO3 and GPIO2 become DTR# and DSR#, respectively, when
GPIO_MODE[2:0] = ’010’.
1.5.6 Automatic XON/XOFF Software Flow Control
When software flow control is enabled, the V1412 compares the receive data characters with the programmed
Xon or Xoff characters. If the received character matches the programmed Xoff character, the V1412 will halt
transmission as soon as the current character has completed transmission. Data transmission is resumed
when a received character matches the Xon character. Software flow control is enabled when
FLOW_CONTROL[2:0] = ’010’.
1.5.7 Multidrop Mode with address matching
The V1412 device has two address matching modes which are also set by the flow control register using
modes 3 and 4. These modes are intended for a multi-drop network application. In these modes, the
XON_CHAR register holds a unicast address and the XOFF_CHAR holds a multicast address. A unicast
address is used by a transmitting master to broadcast an address to all attached slave devices that is intended
for only one slave device. A multicast address is used to broadcast an address intended for more than one
recipient device. Each attached slave device should have a unique unicast address value stored in the
XON_CHAR register, while multiple slaves may have the same multicast adderss stored in the XOFF_CHAR
register. An address match occurs when an address byte (9th bit or parity bit is ’1’) is received that matches the
value stored in either the XON_CHAR or XOFF_CHAR register.
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