XR21V1412_10 Datasheet, PDF (23/30 Pages) Exar Corporation – 2-CH FULL-SPEED USB UART

XR21V1412
REV. 1.1.0
2-CH FULL-SPEED USB UART
3.3.11 GPIO_MODE Register Description (Read/Write)
GPIO_MODE[2:0]: GPIO Mode Select
There are 4 modes of operation for the GPIOs. The descriptions can be found in “Section 1.5, UART” on
page 9.
TABLE 14: GPIO MODES
BITS
[2:0]
GPIO0 GPIO1 GPIO2 GPIO3
GPIO4 GPIO5
MODE DESCRIPTION
000 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO Mode, All GPIO pins available as GPIO
001 GPIO0 GPIO1 GPIO2 GPIO3 CTS# RTS# GPIO4 and GPIO5 used for Auto RTS/CTS HW
Flow Control
010 GPIO0 GPIO1 DSR# DTR# GPIO4 GPIO5 GPIO2 and GPIO3 used for Auto DTR/DSR
HW Flow Control
011 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 XCVR GPIO5 used for Auto Transceiver Enable dur-
Enable ing Transmit
100 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 XCVR GPIO5 used for Auto Transceiver Enable after
Enable address match (See FLOW_CONTROL mode
4).
GPIO_MODE[3]: Transceiver Enable Polarity
• Logic 0 = GPIO5 Low for TX
• Logic 1 = GPIO5 High for TX
GPIO_MODE[7:4]: Reserved
These register bits are reserved. When writing to these bits, the value should be ’0’. When reading from these
bits, they are undefined and should be ignored.
3.3.12 GPIO_DIRECTION Register Description (Read/Write)
This register controls the direction of the GPIO if it is not controlled by the GPIO_MODE register.
GPIO_DIRECTION[5:0]: GPIOx Direction
• Logic 0 = GPIOx is an input.
• Logic 1 = GPIOx is an output.
GPIO_DIRECTION[7:6]: Reserved
These register bits are reserved and should be ’0’.
3.3.13 GPIO_INT_MASK Register Description (Read/Write)
Enables / disables generation of a USB interrupt packet at the change of state of GPIO pins when they are
configured as inputs.
GPIO_INT_MASK[5:0]: GPIOx Interrupt Mask
• Logic 0 = A change on this input causes the device to generate an interrupt packet.
• Logic 1 = A change on this input does not cause the device to generate an interrupt packet.
GPIO_INT_MASK[7:6]: Reserved
These register bits are reserved and should be ’0’.
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