XRT86VX38A Datasheet, PDF (183/191 Pages) Exar Corporation – 8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION

XRT86VX38A
REV. 1.0.0
8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
TABLE 167: LIU CHANNEL CONTROL ARBITRARY REGISTER 8 (LIUCCAR8)
HEX ADDRESS:0X0FNF
BIT
FUNCTION
TYPE DEFAULT
7
Reserved
R/W
0
DESCRIPTION-OPERATION
6
Arb_seg8
R/W
0
Arbitrary Transmit Pulse Shape, Segment 8
These seven bits form the eight of the eight segments of the trans-
mit shape pulse when the XRT86VX38A is configured in “Arbitrary
Mode”.
These seven bits represent the amplitude of the nth channel's arbi-
trary pulse in signed magnitude format with Bit 6 as the sign bit and
Bit 0 as the least significant bit (LSB).
Arbitrary mode is enabled by writing to the EQC[4:0] bits in register
0xNf00.
TABLE 168: LIU GLOBAL CONTROL REGISTER 0 (LIUGCR0)
HEX ADDRESS: 0X0FE0
BIT
FUNCTION
TYPE DEFAULT
DESCRIPTION-OPERATION
7
SR
R/W
0
Single Rail mode
This bit must set to "1" for Single Rail mode to use LIU diagnostic
features. The Framer section must be programmed as well in Regis-
ter 0xN101.
0 - Dual Rail
1 - Single Rail
6
ATAOS
R/W
0
Automatic Transmit All Ones Upon RLOS:
This bit enables automatic transmission of All Ones Pattern upon
detecting the Receive Loss of Signal (RLOS) condition.
Once this bit is enabled, the Transmit E1 Framer Block will automat-
ically transmit an All “Ones” data to the line for the channel that
detects an RLOS condition.
0 = Disables the “Automatic Transmit All Ones” feature upon detect-
ing RLOS
1 = Enables the “Automatic Transmit All Ones” feature upon detect-
ing RLOS
5
RCLKE
R/W
0
Receive Clock Data (Framer Bypass mode)
0 = RPOS/RNEG data is updated on the rising edge of RCLK
1 = RPOS/RNEG data is updated on the falling edge of RCLK
4
TCLKE
R/W
0
Transmit Clock Data (Framer Bypass mode)
0 = TPOS/TNEG data is sampled on the falling edge of TCLK
1 = TPOS/TNEG data is sampled on the rising edge of TCLK
3
DATAP
R/W
0
Data Polarity
0 = Transmit input and receive output data is active “High”
1 = Transmit input and receive output data is active “Low”
2
Reserved
This Bit Is Not Used
180