XR17V358 Datasheet, PDF (18/68 Pages) Exar Corporation – HIGH PERFORMANCE OCTAL PCI EXPRESS UART

XR17V358
PRELIMINARY
HIGH PERFORMANCE OCTAL PCI EXPRESS UART
REV. P1.0.2
1.4 Device Configuration Registers
The Device Configuration Registers provide easy programming of general operating parameters to the V358
and for monitoring the status of various functions. These registers control or report on all 8 channel UARTs
functions that include interrupt control and status, 16-bit general purpose timer control and status, multipurpose
inputs/outputs control and status, sleep mode control, soft-reset control, and device identification and revision,
and others. Tables 5 and 6 below show these registers in BYTE and DWORD alignment. Each of these
registers is described in detail in the following paragraphs.
TABLE 5: DEVICE CONFIGURATION REGISTERS SHOWN IN BYTE ALIGNMENT
ADDRESS [A7:A0]
Ox080
Ox081
REGISTER
INT0 [7:0]
INT1 [15:8]
READ/WRITE COMMENT
Read-only Interrupt [7:0]
Read-only
RESET STATE
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Ox082
Ox083
INT2 [23:16]
INT3 [31:24]
Read-only
Read-only
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Ox084
Ox085
Ox086
Ox087
TIMERCNTL
REGA
TIMERLSB
TIMERMSB
Read/Write Timer Control
Reserved
Read/Write Timer LSB
Read/Write Timer MSB
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0]= 0x00
Bits [7:0]= 0x00
Ox088
Ox089
Ox08A
Ox08B
8XMODE
4XMODE
RESET
SLEEP
Individual UART channels can only control the bit
pertaining to that channel in the registers at address
offset 0x088-0x08B.
Read/Write
Read/Write
Write-only Self clear bits after executing Reset
Read/Write Sleep mode
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0]= 0x00
Ox08C
Ox08D
Ox08E
Ox08F
DREV
DVID
REGB
MPIOINT[7:0]
Read-only Device revision
Read-only Device identification
Read/Write EEPROM control
Read/Write MPIO[7:0] interrupt mask
Bits [7:0] = Current Rev.
Bits [7:0] = 0x88
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Ox090
Ox091
Ox092
Ox093
MPIOLVL[7:0]
MPIO3T[7:0]
MPIOINV[7:0]
MPIOSEL[7:0]
Read/Write MPIO[7:0] level control
Read/Write MPIO[7:0] output control
Read/Write MPIO[7:0] input polarity select
Read/Write MPIO[7:0] select
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0] = 0x00
Bits [7:0] = 0xFF
0x094
Ox095
Ox096
Ox097
MPIOOD[7:0]
MPIOINT[15:8]
MPIOLVL[15:8]
MPIO3T[15:8]
Read/Write MPIO[7:0] open-drain output control
Read/Write MPIO[15:8] interrupt mask
Read/Write MPIO[15:8] level control
Read/Write MPIO[15:8] output control
Bits [7:0] = 0x00
Bits [15:8] = 0x00
Bits [15:8] = 0x00
Bits [15:8] = 0x00
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