XR16C2850IJ-F Datasheet, PDF (15/51 Pages) Exar Corporation – 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS

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REV. 2.1.3
XR16C2850
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE
16X or 8X
Clock
128 bytes by 11-bit
wide FIFO
Receive Data
Byte and Errors
Receive Data Shift
Register (RSR)
Receive
Data FIFO
Receive
Data
Data Bit
Validation
Receive Data Characters
Example:
- RX FIFO trigger level selected at 16 bytes
(See Note Below)
Data falls to 8 ^{RTS# re-asserts when data falls below the flow}
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
FIFO Trigger=16 ^{RHR Interrupt (ISR bit-2) programmed for}
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
Data fills to 24 ^{RTS# de-asserts when data fills above the flow}
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RXFIFO1
NOTE: Table-B selected as Trigger Table for Figure 10 (Table 10).
2.12 Auto RTS (Hardware) Flow Control
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see Figure 11):
• Enable auto RTS flow control using EFR bit-6.
• The auto RTS function must be started by asserting RTS output pin (MCR bit-1 to logic 1 after it is enabled).
With the Auto RTS function enabled, the RTS# output pin will not be de-asserted (HIGH) when the receive
FIFO reaches the programmed trigger level, but will be de-asserted when the FIFO reaches the next trigger
level (See Table 10). The RTS# output pin will be asserted (LOW) again after the FIFO is unloaded to the next
trigger level below the programmed trigger level. However, even under these conditions, the 2850 will continue
to accept data until the receive FIFO is full if the remote UART transmitter continues to send data.
• Enable RTS interrupt through IER bit-6 (after setting EFR bit-4). The UART issues an interrupt when the
RTS# pin is de-asserted (HIGH) during Auto RTS flow control mode: ISR bit-5 will be set to logic 1.
2.13 Auto RTS Hysteresis
The 2850 has a new feature that provides flow control trigger hysteresis while maintaining compatibility with
the XR16C850, ST16C650A and ST16C550 family of UARTs. With the Auto RTS function enabled, an
interrupt is generated when the receive FIFO reaches the programmed RX trigger level. The RTS# pin will not
be forced HIGH (RTS off) until the receive FIFO reaches the upper limit of the hysteresis level. The RTS# pin
will return LOW after the RX FIFO is unloaded to the lower limit of the hysteresis level. Under the above
described conditions, the 2850 will continue to accept data until the receive FIFO gets full. The Auto RTS
function is initiated when the RTS# output pin is asserted LOW (RTS On). Table 13 shows the complete
details for the Auto RTS# Hysteresis levels. Please note that this table is for programmable trigger levels only
(Table D). The hysteresis values for Tables A-C are the next higher and next lower trigger levels in the
corresponding table.
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