XR17L154 Datasheet, PDF (13/56 Pages) Exar Corporation – 3.3V PCI BUS QUAD UART

XR17L154
3.3V PCI BUS QUAD UART
REV. 1.1.0
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DISCONTINUED
Registers INT3, INT2 and INT1 [32:8]
Twenty four bit encoded interrupt indicator. Each channel’s interrupt is encoded into 3 bits for receive, transmit,
and status. Bit [10:8] represent channel 0 and go up to channel 3 with bits [19:17]. The 3 bit encoding and their
priority order are shown below in Table 5 . The Timer and MPIO interrupts are for the device and therefore they
exist within channel 0 space and not in other channel interrupt.
.
FIGURE 4. THE GLOBAL INTERRUPT REGISTER, INT0, INT1, INT2 AND INT3
Interrupt Registers,
INT0, INT1, INT2 and INT3
INT3 Register
INT2 Register
INT1 Register
Rsvd
Rsvd
Rsvd
Rsvd
Channel-3
C h a n n e l-2
Channel-1
C h a n n e l-0
Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit Bit
N+2 N+1 N N+2 N+1 N N+2 N+1 N N+2 N+1 N N+2 N+1 N N+2 N+1 N N+2 N+1 N N+2 N+1 N
INT0 Register
Rsvd Rsvd Rsvd Rsvd Ch-3 Ch-2 Ch-1 Ch-0
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
TABLE 5: UART CHANNEL [3:0] INTERRUPT SOURCE ENCODING
PRIORITY BIT[N+2] BIT[N+1] BIT[N]
INTERRUPT SOURCE(S)
x
0
0
0 None
1
0
0
1 RXRDY and RX Line Status (logic OR of LSR[4:1])
2
0
1
0 RXRDY Time-out
3
0
1
1 TXRDY, THR or TSR (auto RS485 mode) empty
4
1
0
0 MSR, RTS/CTS or DTR/DSR delta or Xoff/Xon det. or special char. detected
5
1
0
1 Reserved.
6
1
1
0 MPIO pin(s). Available only within channel 0, reserved in other channels.
7
1
1
1 TIMER Time-out. Available only within channel 0, reserved in other channels.
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