SP6132H Datasheet, PDF (11/14 Pages) Sipex Corporation – High Voltage, 300KHz Synchronous PWM Controller

APPLICATIONS INFORMATION: Continued
The goal of loop compensation is to manipulate
loop frequency response such that its gain crosses
over 0db at a slope of -20db/dec. The first step
of compensation design is to pick the loop
crossover frequency. High crossover frequency
is desirable for fast transient response, but often
jeopardizes the system stability. Crossover fre-
quency should be higher than the ESR zero but
less than 1/5 of the switching frequency. The
ESR zero is contributed by the ESR associated
with the output capacitors and can be deter-
mined by:
When the output capacitors are of a Ceramic
Type, the SP6132H requires a Type III compen-
sation circuit to give a phase boost of 180° in
order to counteract the effects of an under damped
resonance of the output filter at the double pole
frequency.
Gain
(dB)
Condition:
C22 >> CP1, R1 >> RZ3
Error Amplify Gain
Bandwidth Product
ƒ_Z(ESR) =
1
2π C_OUT R_ESR
The next step is to calculate the complex conju-
gate poles contributed by the LC output filter,
ƒ_P(LC) =
1
2π L C_OUT
20 Log (RZ2/R1)
Frequency
(Hz)
Bode Plot of Type III Error Amplify Compensation.
Date:2/14/06
SP6132H High Voltage, Synchronous PWM Controller
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