UMFT60X Datasheet, PDF (9/24 Pages) List of Unclassifed Manufacturers – UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board

UMFT60x FIFO TO USB 3.0 Bridge Evaluation Board
Version 1.0
Document Reference No.: FT_001191 Clearance No.: FTDI#457
2.2.4 JP2 – VCC33 Selection
Select whether the module main power is supplied by DC5V or the FIFO master board DC3.3V.^[Note]
Jumper position
Short pin 1-2
Short pin 2-3
Description
Select powered by external DV5V or VBUS
Select powered by FIFO master Board(default)
Table 2.4 JP3 – VCC33 Option
2.2.5 JP3, JP6– VCCIO Selection
Select the IO voltage level. ^[Note]
Jumper position
JP3
JP6
Description
Short pin 1-2
Open
VCCIO=2.5V(default)
Short pin 2-3
Open
VCCIO=1.8V
Open
Short
VCCIO=3.3V
Table 2.5 JP3 – VCCIO Option
2.2.6 JP4, JP5 –FIFO mode selection and GPIO pin out
Select Multi-channel FIFO mode or 245 Synchronous FIFO mode.
JP4 pin2 is GPIO_0 pin out and JP5 pin2 is GPIO_1 pin out.
Jumper position
JP4
JP5
1-2(or open)
1-2(or open)
FIFO Mode
Channel
No.
Multi-Channel FIFO
4
GPIO valid
GPIO_0
(JP4 pin2)
Yes
GPIO_1
(JP5 pin2)
Yes
1-2(or open)
2-3
Multi-Channel FIFO
2
Yes
No
2-3
1-2(or open)
Multi-Channel FIFO
1
No
Yes
2-3
2-3
245 Synchronous FIFO
1
No
No
Table 2.6 JP4, JP5 – Configurations
Note: Please refer to section 4 Hardware setup guide for more details power configuration options
and jumpers positions.
2.2.7 SW1, SW2 – Push Buttons for Reset and Remote Wake Up
SW1 – Reset, module hardware reset, mapped to FMC/HSMC connector, can be used for FIFO
master reset. Drive low when press down.
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