SKY72310 Datasheet, PDF (8/19 Pages) List of Unclassifed Manufacturers – SKY72310: Spur-Free, 2.1 GHz Single Fractional-N Frequency Synthesizer

DATA SHEET • SKY72310 FREQUENCY SYNTHESIZER
Modulation Using the SKY72300, SKY72301, and SKY72302 Dual
Synthesizers/PLLs (document number 101349).
Register Descriptions
Table 1 lists the eight 16-bit registers that are used to program
the SKY72310. All register writes are programmed address first,
followed directly with data. MSBs are entered first. On power up,
all registers are reset to 0x000 except the Divider Register at
address 0x0, which is set to 0x006.
Synthesizer Registers
The Divider Register contains the integer portion closest to the
desired fractional-N (or the integer-N) value minus 32. This
register, in conjunction with the Dividend Registers (which control
the fraction offset from –0.5 to +0.5), allows selection of a
precise frequency. As shown in Figure 5, the value to be loaded
is:
• Synthesizer Divider Index = Nine-bit value for the integer
portion of the synthesizer divider. Valid values for this register
are from 6 to 505 (fractional-N) or 0 to 511 (integer-N).
The Dividend MSB and LSB Registers control the fraction part of
the desired fractional-N value and allow an offset of –0.5 to +0.5
to the main integer selected through the Divider Register. As
shown in Figures 6 and 7, values to be loaded are:
• Synthesizer Dividend (MSBs) = Ten-bit value for the MSBs of
the 18-bit dividend for the synthesizer.
• Synthesizer Dividend (LSBs) = Eight-bit value for the LSBs of
the 18-bit dividend for the synthesizer.
The Dividend Register MSB and LSB values are 2's complement
format.
NOTE: When in 10-bit mode, the Dividend LSB Register is not
required.
The reference frequency divider provides the reference frequency
to the phase detector by dividing the crystal oscillator frequency.
Divide ratios from 1 to 32 are possible for the reference frequency
divider (see Table 2).
The Reference Frequency Dividers Register configures the
reference frequency divider for the synthesizer. As shown in
Figure 8, the values to be loaded are:
• Reference Frequency Divider Index = Desired oscillator
frequency division ratio –1. Default value on power up is 0,
signifying that the reference frequency is not divided for the
phase detector.
Table 1. SKY72310 Register Map
Address (Hex)
Register (Note 1)
0
Divider Register
1
Dividend MSB Register
2
Dividend LSB Register
3
Unused
4
Unused
5
Reference Frequency Dividers Register
6
Phase Detector/Charge Pump Control Register
7
Power Down/Multiplexer Output Select Control Register
8
Modulation Control Register
9
Modulation Data Register
—
Modulation Data Register (Note 2) — direct input
Length (Bits)
12
12
12
12
12
12
12
12
2 ≤ length ≤ 12 bits
Note 1: All registers are write only.
Note 2: No address bits are required for modulation data. Any serial data between 2 and 12 bits long is considered modulation data.
Address (Bits)
4
4
4
4
4
4
4
4
0
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July 30, 2008 • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • 200705E