SKY72310 Datasheet, PDF (13/19 Pages) List of Unclassifed Manufacturers – SKY72310: Spur-Free, 2.1 GHz Single Fractional-N Frequency Synthesizer

DATA SHEET • SKY72310 FREQUENCY SYNTHESIZER
Table 4. SKY72310 Signal Descriptions
Pin #
Pin Name
Type
Description
1
VCCecl/cml
Power and ground ECL/CML, 3 V. Removing power safely powers down the associated divider chain and charge pump.
2
Fvco_main
Input
Main VCO differential input.
3
Fvco_main
Input
Main VCO complimentary differential input.
4
LD/PS_main
Analog output
Programmable output pin. Indicates phase detector out-of-lock as an active low pulsing open collector
output (high impedance when lock is detected), or helps the loop filter steer the VCO. This pin is
configured using the Phase Detector/Charge Pump Control Register.
5
VCCcp_main
(Note 1)
Power and ground
Charge pump supply, 3 to 5 V. Removing power safely powers down the associated divider chain and
charge pump.
6
CPout_main
Analog output
Charge pump output. The gain of the charge pump phase detector is controlled by the Phase
Detector/Charge Pump Control Register.
7
N/C
–
No connection
8
Xtalacgnd/OSC
Ground/input
Reference crystal AC ground or external oscillator differential input.
9
Xtalin/OSC
Input
Reference crystal input or external oscillator differential input.
10 Xtalout/NC
Input
Reference crystal output or no connect.
11 VCCxtal
Power and ground Crystal oscillator ECL/CML, 3 V.
12 GNDxtal
Power and ground Crystal oscillator ground.
13 N/C
–
No connection
14 N/C
–
No connection
15 N/C
–
No connection
16 N/C
–
No connection
17 N/C
–
No connection
18 N/C
–
No connection
19 VCCdigital (Note 1) Power and ground Digital supply, 3 V.
20 Data
Digital input
Serial address and data input pin. Address bits are followed by data bits.
21 CS
Digital input
Active low enable pin. Enables loading of address and data on the Data pin on the rising edge of Clock.
When CS goes high, data is transferred to the register indicated by the address. Subsequent clock edges
are ignored.
22 Clock
Digital input
Clock signal pin. When CS is low, the register address and data are shifted in address bits first on the
Data pin on the rising edge of Clock.
23 Mod_in
Digital input
Alternate serial modulation data input pin. Address bits are followed by data bits.
24 Mux_out
Digital output
Internal multiplexer output. Selects from oscillator frequency, reference frequency, divided VCO
frequency, serial data out, or testability signals. This pin can be tri-stated from the synthesizer registers.
Note 1: Associated pairs of power and ground pins must be decoupled using 0.1 µF capacitors.
Table 5. Absolute Maximum Ratings
Parameter
Min
Max
Units
Maximum analog RF supply voltage
3.6
VDC
Maximum digital supply voltage
3.6
VDC
Maximum charge pump supply voltage
5.25
VDC
Storage temperature
–65
+150
°C
Operating temperature
–40
+85
°C
Note: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other
parameters set at or below their nominal values.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [e-mail] • www.skyworksinc.com
200705E • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • July 30, 2008
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