English
Language : 

M0519 Datasheet, PDF (7/69 Pages) List of Unclassifed Manufacturers – 32-bit Microcontroller
M0519
2 FEATURES
 Core
– ARM® Cortex® -M0 core running up to 72 MHz
– One 24-bit system timer
– Supports Low Power Sleep mode by WFI instructions
– Single-cycle 32-bit hardware multiplier
– Supports programmable 4 level priorities of Nested Vectored Interrupt Controller
(NVIC)
– Supports Serial Wire Debug (SWD) support with two watchpoints and four breakpoints
 Built-in LDO for wide operating voltage ranged from 2.5V to 5.5V
 Memory
– 128K/64K bytes Flash for program memory (APROM)
– 4KB Flash for data memory (Data Flash)
– 8KB Flash for loader (LDROM)
– Supports In-system program (ISP) and In-application program (IAP) application code
update
– Supports 2-wired ICP update through SWD/ICE interface
– Supports fast parallel programming mode by external programmer
– 16K bytes embedded SRAM
 Clock Control
– Built-in 22.1184 MHz internal high speed RC oscillator (HIRC) for system operation
(variation < 2% at -40˚C ~ +105˚C)
– Built-in 10 kHz internal low speed RC oscillator (LIRC) for Watchdog Timer and wake-
up operation
– Built-in 4~24 MHz external high speed crystal oscillator (HXT) for precise timing
operation
– Supports one PLL up to 72 MHz for high performance system operation, sourced from
HIRC and HXT
– Supports clock output
 Hardware divider
– Supports signed 32-bit dividend, 16-bit divisor operation
 GPIO port
– Four I/O modes:
– TTL/Schmitt trigger input selectable
– Bit control available
– I/O pin configured as interrupt source with edge/level trigger setting
– Supports high driver and high sink current I/O (up to 16 mA at 5V)
– INT0 and INT1 pins with individual interrupt vectors
– Supports up to 82/51/38 GPIOs for LQFP100/64/48 respectively
 Timers
– Supports 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit prescale counter
– Provides One-shot, Periodic, Toggle and Continuous Counting operation modes
– Supports event counting function to count the event from external pin
 Watchdog Timer
– Supports multiple clock sources from LIRC(default selection) and HCLK/2048
– 8 selectable time-out period from 1.6ms ~ 26.0sec (depending on clock source)
– Able to wake up from Power-down or Idle mode
– Interrupt or reset selectable on watchdog time-out
– Time-out reset delay period time can be selected
 Window Watchdog Timer
Nov. 02, 2016
Page 7 of 69
Rev 1.02