71256L25YG Datasheet, PDF (7/10 Pages) List of Unclassifed Manufacturers – CMOS Static RAM 256K (32K x 8-Bit)

IDT71256S/L
CMOS Static RAM 256K (32K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
Timing Waveform of Read Cycle No. 1⁽¹⁾
tRC
ADDRESS
OE
CS
DATAOUT
tAA
tOE
tOLZ ⁽⁵⁾
tACS
tCLZ ⁽⁵⁾
tOH
tOHZ(5)
tCHZ(5)
2946 drw 07
Timing Waveform of Read Cycle No. 2^(1,2,4)
tRC
ADDRESS
DATAOUT
tAA
tOH
Timing Waveform of Read Cycle No. 2^(1,3,4)
CS
DATAOUT
tACS
tCLZ ⁽⁵⁾
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
tOH
,
2946 drw 08
tCHZ(5)
2946 drw 09
6.472