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71256L25YG Datasheet, PDF (6/10 Pages) List of Unclassifed Manufacturers – CMOS Static RAM 256K (32K x 8-Bit)
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IDT71256S/L
CMOS Static RAM 256K (32K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
AC Electrical Characteristics (VCC = 5.0V ± 10%, Military Temperature Ranges)
71256S55(1)
71256L55(1)
71256S70(1)
71256L70(1)
71256S85(1)
71256L85(1)
71256S100(1)
71256L100(1)
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tRC
Read Cycle Time
55
____
70
____
85
____
100
____
ns
tAA
Address Access Time
____
55
____
70
____
85
____
100 ns
tACS
Chip Select Access Time
____
55
____
70
____
85
____
100 ns
tCLZ(2)
Chip Select to Output in Low-Z
5
____
5
____
5
____
5
____
ns
tCHZ(2)
Chip Desele ct to Output in High-Z
____
25
____
30
____
35
____
40 ns
tOE
Output Enable to Output Valid
____
25
____
30
____
35
____
40 ns
tOLZ(2)
Output Enab le to Output in Low-Z
0
____
0
____
0
____
0
____
ns
tOHZ(2)
Output Disab le to Output in High-Z
0
25
0
30
____
35
____
40 ns
tOH
Output Hold from Address Change
5
____
5
____
5
____
5
____
ns
Write Cycle
tWC
Write Cycle Time
55
____
70
____
85
____
100
____
ns
tCW
Chip Select to End-of-Write
50
____
60
____
70
____
80
____
ns
tAW
Address Valid to End-of-Write
50
____
60
____
70
____
80
____
ns
tAS
Address Set-up Time
0
____
0
____
0
____
0
____
ns
tWP
Write Pulse Width
40
____
45
____
50
____
55
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
0
____
ns
tDW
Data to Write Time Overlap
25
____
30
____
35
____
40
____
ns
tWHZ(2)
tDH
Write Enab le to Output in High-Z
Data Hold from Write Time (WE)
____
25
____
30
____
35
____
40 ns
0
____
0
____
0
____
0
____
ns
tOW(2)
Output Active from End-of-Write
5
____
5
____
5
____
5
____
ns
NOTES:
1. -55° to +125°C temperature range only.
2. This parameter is guaranteed by device characterization, but is not production tested.
2946 tbl 13
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