71256L25YG Datasheet, PDF (5/10 Pages) List of Unclassifed Manufacturers – CMOS Static RAM 256K (32K x 8-Bit)

IDT71256S/L
CMOS Static RAM 256K (32K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
Low VCC Data Retention Waveform
DATA
RETENTION
MODE
VCC
4.5V
4.5V
tCDR
VDR ≥ 2V
tR
CS
VIH
VIH
VDR
2946 drw 06
AC Electrical Characteristics (VCC = 5.0V ± 10%, All Temperature Ranges)
71256L20⁽¹⁾
71256S25⁽³⁾
71256L25
71256S35⁽³⁾
71256L35
71256S45⁽³⁾
71256L45⁽³⁾
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. ^Unit
Read Cycle
tRC
Read Cycle Time
20
____
25
____
35
____
45
____
ns
tAA
Address Access Time
____
20
____
25
____
35
____
45 ns
tACS
Chip Select Access Time
____
20
____
25
____
35
____
45 ns
tCLZ⁽²⁾
Chip Select to Output in Low-Z
5
____
5
____
5
____
5
____
ns
tCHZ⁽²⁾
Chip Deselect to Output in High-Z
____
10
____
11
____
15
____
20 ns
tOE
Output Enable to Output Valid
____
10
____
11
____
15
____
20 ns
tOLZ⁽²⁾
Output Enable to Output in Low-Z
2
____
2
____
2
____
0
____
ns
tOHZ⁽²⁾
Output Disable to Output in High-Z
2
8
2
10
2
15
____
20 ns
tOH
Output Hold from Address Change
5
____
5
____
5
____
5
____
ns
Write Cycle
tWC
Write Cycle Time
20
____
25
____
35
____
45
____
ns
tCW
Chip Select to End-of-Write
15
____
20
____
30
____
40
____
ns
tAW
Address Valid to End-of-Write
15
____
20
____
30
____
40
____
ns
tAS
Address Set-up Time
0
____
0
____
0
____
0
____
ns
tWP
Write Pulse Width
15
____
20
____
30
____
35
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
0
____
ns
tDW
Data to Write Time Overlap
11
____
13
____
15
____
20
____
ns
tWHZ⁽²⁾
Write Enable to Output in High-Z
____
10
____
11
____
15
____
20 ns
tDH
Data Hold from Write Time
0
____
0
____
0
____
0
____
ns
tOW⁽²⁾
Output Active from End-of-Write
5
____
5
____
5
____
5
____
ns
NOTES:
1. 0° to +70°C or -40° to +85°C temperature range only.
2. This parameter is guaranteed by device characterization, but is not production tested.
3. –55°C to +125°C temperature range only.
2946 tbl 12
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