SI8450 Datasheet, PDF (6/36 Pages) List of Unclassifed Manufacturers – LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR

Si8450/51/52/55
Table 3. Electrical Characteristics (Continued)
(V_DD1 = 5 V±10%, V_DD2 = 5 V±10%, T_A = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)
Si8450Bx, Si8455Bx
V_DD1
V_DD2
—
4.3
6.5
mA
—
4.8
6.7
Si8451Bx
V_DD1
—
4.4
6.2
mA
V_DD2
Si8452Bx
d ^V_DD1
e ^VDD2
—
5.0
7.0
—
4.6
6.4
—
4.8
6.7
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
d _{Si8450Bx, Si8455Bx}
n ^VDD1
s _VDD2
e _{n Si8451Bx}
V_DD1
m _ig ^V_DD2
Si8452Bx
m ^{s V}DD1
o ^{e VDD2}
—
—
—
—
—
—
Timing Characteristics
4.6
6.9
24
30
8.6
10.8
20.4
25.5
12.6
15.8
16.5
20.6
c ^D _Si845xAx
e Maximum Data Rate
0
—
1.0
w _{Minimum Pulse Width}
—
—
250
R _{e Propagation Delay}
t_PHL, t_PLH See Figure 2
—
t _{Pulse Width Distortion}
PWD
See Figure 2
—
o ^{N |tPLH - tPHL|}
Propagation Delay Skew²
t_PSK(P-P)
—
N ^{r Channel-Channel Skew}
t_PSK
—
fo ^Notes:
—
35
—
25
—
40
—
35
mA
mA
mA
mA
Mbps
ns
ns
ns
ns
ns
1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. t_PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. See "3. Errata and Design Migration Guidelines" on page 26 for more details.
4. Start-up time is the time period from the application of power to valid data at the output.
6
Rev. 1.5