SI8450 Datasheet, PDF (11/36 Pages) List of Unclassifed Manufacturers – LOW POWER FIVE-CHANNEL DIGITAL ISOLATOR

Si8450/51/52/55
Table 4. Electrical Characteristics (Continued)
(V_DD1 = 3.3 V±10%, V_DD2 = 3.3 V±10%, T_A = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Unit
Si845xBx
Maximum Data Rate
0
—
150 Mbps
Minimum Pulse Width
—
—
6.0
ns
Propagation Delay
t_PHL, t_PLH See Figure 2
3.0
6.0
9.5
ns
Pulse Width Distortion
PWD
See Figure 2
—
1.5
2.5
ns
|t_PLH - t_PHL|
Propagation Delay Skew²
Channel-Channel Skew
d _{All Models}
t_PSK(P-P)
t_PSK
—
2.0
3.0
ns
—
0.5
1.8
ns
de ^{Output Rise Time}
t_r
C_L = 15 pF
—
See Figure 2
4.3
6.1
ns
n _s ^{Output Fall Time}
t_f
C_L = 15 pF
—
See Figure 2
3.0
4.3
ns
e _{n Common Mode Transient}
Immunity
CMTI V_I = V_DD or 0 V
—
25
— kV/µs
m _ig Enable to Data Valid³
m ^{s Enable to Data Tri-State3}
Start-up Time^3,4
t_en1
See Figure 1
—
t_en2
See Figure 1
—
t_SU
—
5.0
8.0
ns
7.0
9.2
ns
15
40
µs
o ^{e Notes:}
1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the
c ^D _{value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads}
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
e _{impedance PCB traces.}
w _{2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at}
R _{the same supply voltages, load, and ambient temperature.}
e _{3. See "3. Errata and Design Migration Guidelines" on page 26 for more details.}
Not _for ^{N 4. Start-up time is the time period from the application of power to valid data at the output.}
Rev. 1.5
11