PL3120 Datasheet, PDF (6/13 Pages) List of Unclassifed Manufacturers – Line Smart Transceivers

®
Symbol
I_pu
I_DD
I_DD
V_LVI
Parameter
Min.
Pull-up Source Current (Vout=0, Output=High-Z)²
30
PL 3120 Power Line Smart Transceiver V_DD5 + V_DD5A Supply
Current (not including I/O or internal pull-up current)
PL 3150 Power Line Smart Transceiver V_DD5 + V_DD5A Supply
Current (not including I/O or internal pull-up current)
V_DD5 LVI Trip Point
4.0
Typ.
Max.
Unit
300
µA
9
13
mA
12
16
mA
4.45
V
External Memory Interface Timing - PL 3150 Power Line Smart Transceiver (over
recommended operating conditions) See Figures 1 to 6 for detailed measurement information
Parameter
t_cyc
t_cyc
PW_EH
PW_EL
t_AD
t_AH
t_RD
t_RH
t_WR
t_WH
t_DSR
t_DHR
t_DHW
t_DDW
t_acc⁵
Description
Memory Cycle Time
(Input Clock 10MHz, +/- 200ppm)
Memory Cycle Time
(Input Clock 6.5536MHz, +/- 200ppm)
Pulse Width, E High³
Pulse Width, E Low
Delay, E High to Address Valid
Address Hold Time After E High
Delay, E High to R/W Valid Read
R/W Hold Time Read After E High
Delay, E High to R/W Valid Write
R/W Hold Time Write After E High
Read Data Setup Time to E High
Data Hold Time Read After E High
Data Hold Time Write After E High⁴
Delay, E Low to Data Valid
External Read Access Time (t_acc = t_cyc-t_AD-t_DSR) at 10MHz Input Clock
Min.
Max.
Unit
199.96
200.04
ns
305.12
305.79
ns
t_cyc/2-5
t_cyc/2+5
ns
t_cyc/2-5
t_cyc/2+5
ns
40
ns
10
ns
40
ns
10
ns
40
ns
10
ns
20
ns
0
ns
10
ns
15
ns
140
ns
Recommended Operating Conditions for Power Line Smart Transceiver
Discrete Interface Circuitry¹
Symbol
V_ARX
V_ATX
T_A
Parameter
V_A Supply Voltage - Receive Mode⁶
V_A Supply Voltage - Transmit Mode⁶
Ambient Temperature
Min.
Typ.
Max.
Unit
8.5
12.0
18.0
V
10.8
12.0
18.0
V
-40
25
85
ºC
Electrical Characteristics of Power Line Smart Transceiver Discrete Interface
Circuitry¹ (over recommended operating conditions)
Symbol
I_ARX
I_ATX
V_OTX
I_TXLIM
Z_INRX
Z_OTX
V_PMU
V_PML
Parameter
V_A Supply Current - Receive Mode
V_A Supply Current - Transmit Mode
Transmit Output Voltage
Transmit Output Current Limit
Input Impedance - Receive Mode
(with recommended RXCOMP inductor)
Output Impedance - Transmit Mode
Power Management - Upper V_A Threshold
Power Management - Lower V_A Threshold
Min.
Typ.
Max.
Unit
350
500
µA
120
250
mA
7
Vp-p
1.0
Ap-p
500
Ω
0.9
Ω
11.2
12.1
13.0
V
7.3
7.9
8.6
V
NOTES:
3 _{tcyc = 2/f where f is the input clock (XIN) frequency (10 or 6.5536MHz).}
4 _{The data hold parameter, tDHW, is measured to disable levels shown in Figure 6, rather than to the traditional data invalid levels.}
5 _{This parameter considers only the memory read access time from address to data. This does not allow for chip enable decode. See Neuron 3150}
Chip External Memory Interface Engineering Bulletin (005-0013-01D) for memory decode timing analysis examples.
6 _{Minimum value can be 8.5V under certain conditions (refer to Data Book for details).}
Maximum value must also satisfy the following: VATXAVE < (150-TAMAX)/(8*DMAX);
Where: VATXAVE = Average VA supply voltage while transmitting
TAMAX = Maximum ambient temperature (ºC)
DMAX = Maximum transmit duty cycle of the device (expressed as decimal number)
www.echelon.com