PL3120 Datasheet, PDF (4/13 Pages) List of Unclassifed Manufacturers – Line Smart Transceivers

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PL 3150 Power Line Smart Transceiver Pinout Diagram
64 Pin LQFP
PL 3120 and PL 3150 Power Line Smart Transceiver Pin Descriptions
Pin Name Type
Pin Functions
XIN
XOUT
RESET
SERVICE
CLKSEL
IO0-IO3
IO4-IO7, IO11
IO8
IO9
IO10
D0-D7
R/W
Input
Output
Digital I/O (Built-in Pull-up)
Digital I/O
(Built-in Configurable Pull-up)
Digital Input
Digital I/O
Digital I/O
(Built-in Configurable Pull-up)
Digital I/O
Digital I/O
Digital I/O
I/O
Output
Oscillator connection or external clock input.
Oscillator connection.
Reset pin (active LOW).
Note: The maximum external capacitance is 1000pF.
Service pin (active LOW).
Tie to V_DD5.
Large current-sink capacity (20mA). General purpose I/O.
The output of timer/counter 1 may be routed to IO0.
The output of timer/counter 2 may be routed to IO1.
General purpose I/O. The input of timer/counter 1 may be
one of IO4-IO7. The input of timer/counter 2 is IO4.
General purpose I/O. UART RX. SPI slave clock input.
SPI master clock output.
General purpose I/O. SPI slave data output. SPI master
data input.
General purpose I/O. SPI slave data input. SPI master
data output.
Bi-directional data bus
Read/write control output for external memory
PL 3120-E4T10
38 TSSOP Pin No.
29
30
35
36
34
2, 3, 4, 5
6, 7, 8, 9, 33
10
11
12
N/A
N/A
PL 3150-L10
64 LQFP Pin No.
34
35
49
50
48
62, 63, 64, 1
2, 3, 4, 13, 47
14
15
16
12, 11, 10, 9, 8, 7, 6, 5
37
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