ISD9100 Datasheet, PDF (6/26 Pages) List of Unclassifed Manufacturers – ISD Cortex-M0 ChipCorder

ISD9100 Series Datasheet
– Arbitration between simultaneously transmitting masters without corruption of serial data on
the bus
– Serial clock synchronization allows devices with different bit rates to communicate via one
serial bus.
– Serial clock synchronization can be used as a handshake mechanism to suspend and resume
serial transfer.
– Programmable clock allowing versatile rate control.
– I2C-bus controller supports multiple address recognition.
 I²S
– Interface with external audio CODEC.
– Operate as either master or slave.
– Capable of handling 8, 16, 24 and 32 bit word sizes
– Mono and stereo audio data supported
– I²S and MSB justified data format supported
– Two 8 word FIFO data buffers are provided, one for transmit and one for receive
– Generates interrupt requests when buffer levels cross a programmable boundary
– Supports DMA requests, for transmit and receive
 Brown-out detector
– With 8 levels: 2.1V, 2.2V, 2.4V, 2.5V, 2.625V, 2.8V, 3.0V, and 4.6V
– Supports time-multiplex operation to minimize power consumption.
– Supports Brownout Interrupt and Reset option
 Built in Low Dropout Voltage Regulator (LDO)
– Capable of delivering 30mA load current.
– Configurable for output voltage of 1.8V, 2.4V, 3.0V and 3.3V
– Eight GPIO (GPIOA<7:0>) operate from LDO voltage domain allowing direct interface to, for
example, 3V SPI Flash.
– Can be bypassed and voltage domain supplied directly from system power.
 Additional Features
– Over temperature alarm. Can generate interrupt if device exceeds safe operating temperature.
– Temperature proportional voltage source which can be routed to ADC for temperature
measurements.
– Digital Microphone interface.
 Operating Temperature: -40C~85C
 Package:
– All Green package (RoHS)
 LQFP 48-pin
 QFN 33-pin
Release Date: January 8, 2016
-6-
Revision V1.41