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ISD9100 Datasheet, PDF (10/26 Pages) List of Unclassifed Manufacturers – ISD Cortex-M0 ChipCorder
ISD9100 Series Datasheet
Pin No.
LQFP QFN Pin Name
48
33
PB.0
9
- SPI_SSB1
CMP0
SPI_SSB0
10
7 VCCD
11
8 VREG
12
- NC
13
- NC
PA.15
14
- TM1
SDIN
PA.9
15
9 UART_RX
I2S_BCLK
PA.8
16
10 UART_TX
I2S_FS
17
11 VCCSPK
18
12 SPK+
19
13 VSSSPK
20
14 SPK-
21
15 VCCSPK
22
16 RESETN
23
17 ICE_DAT
24
18 ICE_CLK
25
- VSSD
PA.7
26
-
I2S_SDO
27
- PA.6
Pin Type
Alt
CFG
Description
A/I/O
O
AIO
I/O
P
P
I/O
I
I
I/O
I
I/O
I/O
O
I/O
P
O
P
O
P
I
I/O
I
P
I/O
O
I/O
0
General purpose input/output pin, analog capable; Port B, bit
0. Triggers external interrupt 0 (EINT0/IRQ2)
3 Slave Select Bar 1 for SPI interface
2 Configure as relaxation oscillator for capacitive touch sensing
3 Slave Select Bar 0 for SPI interface
Main Digital Supply for Chip. Supplies all IO except analog,
Speaker Driver and PA<7:0>
Logic regulator output decoupling pin. A 1µF capacitor
returning to VSSD must be placed on this pin.
Should remain unconnected.
Should remain unconnected.
0 General purpose input/output pin; Port A, bit 15
1 External input to Timer 1
2 Sigma Delta bit stream input for digital MIC mode
0 General purpose input/output pin; Port A, bit 9
1 Receive channel of UART
2 Bit Clock for I2S interface
0 General purpose input/output pin; Port A, bit 8
1 Transmit channel of UART
2 Frame Sync Clock for I2S interface
Power Supply for PWM Speaker Driver
Positive Speaker Driver Output
Ground for PWM Speaker Driver
Negative Speaker Driver Output
Power Supply for PWM Speaker Driver
External reset input. Pull this pin low to reset device to initial
state. Has internal weak pull-up.
Serial Wire Debug port data pin. Has internal weak pull-up.
Serial Wire Debug port clock pin. Has internal weak pull-up.
Digital Ground.
0 General purpose input/output pin; Port A, bit 7
1 Serial Data Out for I2S interface
0 General purpose input/output pin; Port A, bit 6
- 10 -
Release Date: January 8, 2016
Revision V1.41