N79E855 Datasheet, PDF (2/180 Pages) List of Unclassifed Manufacturers – Microcontroller

N79E855/854 Data Sheet
Table of Contents
1
GENERAL DESCRIPTION................................................................................................................................... 5
2
FEATURES ............................................................................................................................................................ 6
3
PARTS INFORMATION LIST.............................................................................................................................. 8
4
BLOCK DIAGRAM............................................................................................................................................... 9
5
PIN CONFIGURATION ...................................................................................................................................... 10
6
MEMORY ORGANIZATION ............................................................................................................................. 13
6.1 APROM Flash Memory .......................................................................................................................... 13
6.2 LDROM Flash Memory .......................................................................................................................... 14
6.3 CONFIG-bits........................................................................................................................................... 14
6.4 On-chip Non-volatile Data Flash ............................................................................................................ 14
6.5 On-chip XRAM....................................................................................................................................... 16
6.6 On-chip scratch-pad RAM and SFR ....................................................................................................... 16
6.7 Working Registers................................................................................................................................... 17
6.8 Bit-addressable Locations ....................................................................................................................... 17
6.9 Stack........................................................................................................................................................ 18
7
SPECIAL FUNCTION REGISTER (SFR) .......................................................................................................... 19
8
GENERAL 80C51 SYSTEM CONTROL............................................................................................................ 23
9
I/O PORT STRUCTURE AND OPERATION .................................................................................................... 27
9.1 Quasi-Bidirectional Output Configuration .............................................................................................. 27
9.1.1 Read-Modify-Write .................................................................................................................... 28
9.2 Open Drain Output Configuration........................................................................................................... 29
9.3 Push-Pull Output Configuration .............................................................................................................. 29
9.4 Input Only Configuration ........................................................................................................................ 30
10 TIMERS/COUNTERS ......................................................................................................................................... 34
10.1 Timers/Counters 0 and 1 ......................................................................................................................... 34
10.1.1 Mode 0 (13-bit Timer) .............................................................................................................. 38
10.1.2 Mode 1 (16-bit Timer) .............................................................................................................. 38
10.1.3 Mode 2 (8-bit Auto-Reload Timer) .......................................................................................... 39
10.1.4 Mode 3 (Two Separate 8-bit Timers) ....................................................................................... 39
10.2 Timer/Counter 2 ...................................................................................................................................... 41
10.2.1 Input Capture Mode.................................................................................................................. 43
10.2.2 Auto-reload Mode .................................................................................................................... 47
10.2.3 Compare Mode ......................................................................................................................... 48
11 WATCHDOG TIMER (WDT) ............................................................................................................................. 49
11.1 Functional Description ............................................................................................................................ 49
11.2 Applications of Watchdog Timer Reset .................................................................................................. 52
11.3 Applications of Watchdog Timer Interrupt ............................................................................................. 53
12 SERIAL PORT (UART)....................................................................................................................................... 55
12.1 Mode 0 .................................................................................................................................................... 57
12.2 Mode 1 .................................................................................................................................................... 59
12.3 Mode 2 .................................................................................................................................................... 61
12.4 Mode 3 .................................................................................................................................................... 63
12.5 Baud Rates .............................................................................................................................................. 65
12.6 Framing Error Detection ......................................................................................................................... 66
12.7 Multiprocessor Communication .............................................................................................................. 66
12.8 Automatic Address Recognition ............................................................................................................. 67
13 SERIAL PERIPHERAL INTERFACE (SPI) ....................................................................................................... 70
13.1 Features ................................................................................................................................................... 70
April 23, 2014
Page 2 of 180
Revision A2.5