N79E855 Datasheet, PDF (113/180 Pages) List of Unclassifed Manufacturers – Microcontroller

N79E855/854 Data Sheet
Bit
Name Description
1:0
PWMPH PWM Counter Bits Register bit[9:8]
The user should follow the initialization steps below to start generating the PWM signal output. In the first step by setting
CLRPWM (PWMCON0.4), it ensures the 10-bit down counter a determined value. After setting all period and duty
registers, PWMRUN (PWMCON0.7) can be set as logic 1 to trigger the 10-bit down counter running. In the beginning the
PWM output remains high until the counter value is less than the value in duty control registers of PWMnH and PWMnL.
At this point the PWM output goes low until the next underflow. When the 10-bit down counter underflows, PWMP
buffer register will be reloaded in 10-bit down counter. It continues PWM signal output by repeating this routine.
The hardware for all period and duty control registers is double buffered designed. Therefore the PWMP and PWMn
registers can be written to at any time, but the period and duty cycle of PWM will not updated immediately until the Load
(PWMCON0.6) is set and previous period is complete. This allows updating the PWM period and duty glitch less
operation.
PWM0L – PWM 0 Low Register
7
6
5
PWM0.7
PWM0.6
PWM0.5
R/W
R/W
R/W
Address: DAH
4
PWM0.4
R/W
3
PWM0.3
R/W
2
PWM0.2
R/W
1
0
PWM0.1
PWM0.0
R/W
R/W
Reset value: 0000 0000B
Bit
Name Description
7:0
PWM0L PWM 0 Low Bits Register bit[7:0].
PWM0H – PWM 0 High Register
7
6
5
4
3
-
-
-
-
-
-
-
-
-
-
Address: D2H
2
1
0
-
PWM0.9
PWM0.8
-
R/W
R/W
Reset value: 0000 0000B
Bit
Name Description
7:2
-
Reserved
1:0
PWM0H PWM 0 High Bits Register bit[9:8].
PWM1L – PWM 1 Low Register
7
6
5
PWM1.7
PWM1.6
PWM1.5
R/W
R/W
R/W
Address: DBH
4
PWM1.4
R/W
3
PWM1.3
R/W
2
PWM1.2
R/W
1
0
PWM1.1
PWM1.0
R/W
R/W
Reset value: 0000 0000B
Bit
Name Description
7:0
PWM1L PWM 0 Low Bits Register bit[7:0].
April 23, 2014
Page 113 of 180
Revision A2.5